Hi Avi, Marcelo,
here is the patch-set to implement the TSC-scaling feature of upcoming
AMD CPUs. When this feature is supported the CPU provides a new MSR
which holds a multiplier for the hardware TSC which is applied on the
value rdtsc[p] and reads of MSR 0x10. This feature can be used to
emulate a given tsc frequency for the guest.
Patch 1 is not directly related to this patch-set because it only fixes
a bug which prevented me from testing these patches. In fact it fixes
the same bug Andre sent a patch for. But after the discussion about his
patch he told me to just post my patch and thus here it is.
Thanks,
Joerg
Diff-stat:
arch/x86/include/asm/kvm_host.h | 4 ++
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kvm/svm.c | 91 +++++++++++++++++++++++++++++++++++++-
arch/x86/kvm/vmx.c | 12 +++++
arch/x86/kvm/x86.c | 60 ++++++++++++++++++++++---
include/linux/kvm.h | 4 ++
6 files changed, 164 insertions(+), 8 deletions(-)
Shortlog:
Joerg Roedel (6):
KVM: SVM: Advance instruction pointer in dr_intercept
KVM: SVM: Implement infrastructure for TSC_RATE_MSR
KVM: X86: Let kvm-clock report the right tsc frequency
KVM: SVM: Propagate requested TSC frequency on vcpu init
KVM: X86: Delegate tsc-offset calculation to architecture code
KVM: X86: Implement userspace interface to set virtual_tsc_khz
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