KVM clock synchronization

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A further set of improvements to KVM clock.  Now it actually can
stay synchronized on SMP systems with a stable TSC, does not get
destabilized by host suspend, and is resistant to migration.

I did look a bit into the second to last remaining migration issue;
that is, we read the TSCs for all VCPUs at different times, then
write them back at different times as well.  We have compensation
for this already (see patch 1), but there is a possibility that
ordering issues create a backwards condition:

  read VTSC-0
  stop VCPU-0
  read VTSC-1
  stop VCPU-1

In that case, what the compensation code does is reset VTSC-1
back to VTSC-0.  With the above ordering, this is broken.

However, in QEMU, the migration order is:

  stop VCPU-0
  stop VCPU-1
  read VTSC-0
  read VTSC-1

So even if a higher TSC value is read for VTSC-1, no backwards
condition can be generated, as VCPU-1 was not running at the time
and thus could not have observed the higher TSC.

This brings us close to having a perfect KVM clock.

Next steps will be testing to see if this in practice allows us
to drop the atomic backwards protection for KVM clock, and if so,
to implement vread so we have fast system calls for time.

Zach

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