On 12/27/2010 02:37 PM, Nico Prenzel wrote:
Hello KVM developers, I've recently bought such a nice low-power board from VIA (EPIA M-850). The included VIA cpu (VIA NANO U3100) contains of in-silicon features (esp. AES and SHA encryption): /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ #define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */ #define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */ #define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ #define X86_FEATURE_ACE2 (5*32+ 8) /* Advanced Cryptography Engine v2 */ #define X86_FEATURE_ACE2_EN (5*32+ 9) /* ACE v2 enabled */ #define X86_FEATURE_PHE (5*32+ 10) /* PadLock Hash Engine */ #define X86_FEATURE_PHE_EN (5*32+ 11) /* PHE enabled */ #define X86_FEATURE_PMM (5*32+ 12) /* PadLock Montgomery Multiplier */ #define X86_FEATURE_PMM_EN (5*32+ 13) /* PMM enabled */ Now, I'd like to use these features in one of my linux driven kvm-guests to gain the performance of in-silicon encryption. See some benchmark what performance gain to expect: http://www.logix.cz/michal/devel/padlock/bench.xp I've found some useful informations about how to pass cpu features to kvm guests in generally. But they simply won't work if I try to pass the phe(_en)/pmm(_en) feautres to a kvm guest. So my questions by now, would be: Is it generally possible to passthrough these features?
In general cpu features are easy to pass through. Sometimes all that is needed is to enable the cpuid bits in the virtual cpu, sometimes more support is needed (generally when extra registers or new bits in existing registers are defined). Someone needs to read the documentation and check what's needed to be done for each feature.
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