Re: [Qemu-devel] Re: [PATCHv8 00/16] boot order specification

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On Sat, 2010-12-11 at 18:06 +0200, Gleb Natapov wrote:
> http://playground.sun.com/pub/p1275/bindings/pci/pci2_1.pdf has table
> on
> page 10 that defines how pci class code should be translated into OF
> name. This is what my patch is using. pci-ata does not look spec
> compliant (or is there more up-to-date spec?)
> 
> >                                                 What should we do
> with
> > ata-2@600 vs drive@1?
> There is no available IDE OF binding spec, so I when with the way
> OpenBIOS reports ata on qemu-x86. I have no idea what 600 in ata-2@600
> may mean, but looking at g3_beige_300.html there is no such node there
> and looking at any other device tree in
> http://penguinppc.org/historical/dev-trees-html/

Those are old and I wouldn't look too closely at what Apple does.

ATA doesn't really need anything complex, mostly the ata controller,
generally named "ata" nowadays with a #address-cells of 1 and a
#size-cells of 0. Children are then typically disk, cdrom, ... (ie block
devices) with a unit address of 0 for master and 1 for slave.

In the case of controllers with multiple ports, typically you have one
such "ata" node per bus. "pci-ata" is a liberal use by Apple here
representing the actual host controller PCI device.

In any case, what matters is the "compatible" property. This is what
defines the programming interface of a device.

> I haven't found one that use this kind of addressing for pci-ata. 
> http://penguinppc.org/historical/dev-trees-html/g3bw_400.html for
> instance has pci@80000000/pci-bridge@d/pci-ata@1/ata-4. ata-2@600 kind
> of
> addressing is used by devices on mac-io bus which I do not think we
> emulate in qemu. So it looks like OpneBIOS is wrong here. 

Well, it's possible that the @600 represents a register offset within
pci-ata, this is entirely up to pci-ata to do as it wishes there to
define it's own internal binding. Is there a "ranges" property defining
translation accross "pci-ata" ?

Cheers,
Ben.

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