On 11/24/2010 08:18 PM, Joerg Roedel wrote:
Hi Avi, Hi Marcelo, here is a patch-set to make the instruction emulator aware of nested virtualization. It basically works by introducing a new callback into the x86_ops to check if a decoded instruction must be intercepted. If it is intercepted the instruction emulator returns straight into the guest. I am not entirely happy with this solution because it partially duplicates the code in the x86_emulate_insn function.
My big worry is that it makes svm.c aware of internal emulator variable, so it makes it harder to hack on the emulator.
But there are so many SVM specific cases that need to be taken care of that I consider this solution the better one (even when looking at the diff-stat). Keeping this (SVM-specific) complexity in the SVM specific code is better than extending the generic instruction emulator code path.
I don't think there's a problem with svm specific code in the emulator for this. My reasoning is that there are two classes of svm code: the common one is using svm to implement kvm, and the other one is emulating the svm instruction set. Most of the current svm code belongs to the first class, even the nested svm code. For example the code that emulates VMRUN is kvm-specific, while the code that decides whether to #GP on VMRUN or not is generic.
So I don't think there's a problem with coding the svm intercepts in emulate.c. This is no different than emulating any AMD-specific instruction in the emulator - we're emulating an instruction in exactly the way it is specified in the manual.
Something you could do is allocate bits for the intercept bit number and exit code in opcode->flags. This way most unconditional intercepts happen outside the instruction switch: generic code reads the intercept bit, the intercept word (via a callback), if the bit is set, returns the exit code. That should completely kill the diffstat. We only need to be careful wrt the order of the intercept check and the other permission checks.
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