On 07/28/2010 12:37 PM, Roedel, Joerg wrote:
Can it be really this simple? Suppose we emulate a nested guest
instruction just before vmexit, doesn't that invalidate
vmcb->control.next_rip? Can that happen?
Good point. I looked again into it. The documentation states:
The next sequential instruction pointer (nRIP) is saved in
the guest VMCB control area at location C8h on all #VMEXITs that
are due to instruction intercepts, as defined in Section 15.8 on
page 378, as well as MSR and IOIO intercepts and exceptions
caused by the INT3, INTO, and BOUND instructions. For all other
intercepts, nRIP is reset to zero.
There are a few intercepts that may need injection when running nested
immediatly after an instruction emulation on the host side:
INTR, NMI
#PF, #GP, ...
All these instructions do not provide a valid next_rip on #vmexit so we
should be save here. The other way around, copying back a next_rip
pointer when there should be none, should also not happen as far as I
see it. The next_rip is only set for instruction intercepts which are
either handled on the host side or reinjected directly into the L1
hypervisor.
When you don't see a failing case either, I think we are save with this
simple implementation.
I agree, looks like everything's fine here.
We have a slightly different problem, if the nested guest manages to get
an instruction to be emulated by the host (if the guest assigned it the
cirrus framebuffer, for example, so from L1's point of view it is RAM,
but from L0's point of view it is emulated), then we miss the
intercept. L2 could take over L1 this way.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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