On 06/29/2010 10:06 AM, Avi Kivity wrote:
On 06/29/2010 04:17 AM, Xiao Guangrong wrote:
If B is writeable-and-dirty, then it's D bit is already set, and we
don't need to do anything.
If B is writeable-and-clean, then we'll have an spte pointing to a
read-only sp, so we'll get a write fault on access and an
opportunity to
set the D bit.
Sorry, a typo in my reply, i mean mapping A and B both are
writable-and-clean,
while A occurs write-#PF, we should change A's spte map to writable
sp, if we
only update the spte in writable-and-clean sp(form readonly to
writable), the B's
D bit will miss set.
Right.
We need to update something to notice this:
- FNAME(fetch)() to replace the spte
- FNAME(walk_addr)() to invalidate the spte
I think FNAME(walk_addr) is the right place, we're updating the gpte,
so we should update the spte at the same time, just like a guest
write. But that will be expensive (there could be many sptes, so we
have to call kvm_mmu_pte_write()), so perhaps FNAME(fetch) is easier.
We have now
if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
continue;
So we need to add a check, if sp->role.access doesn't match pt_access
& pte_access, we need to get a new sp with the correct access (can
only change read->write).
Note:
- modifying walk_addr() to call kvm_mmu_pte_write() is probably not so
bad. It's rare that a large pte walk sets the dirty bit, and it's
probably rare to share those large ptes. Still, I think the fetch()
change is better since it's more local.
- there was once talk that instead of folding pt_access and pte_access
together into the leaf sp->role.access, each sp level would have its own
access permissions. In this case we don't even have to get a new direct
sp, only change the PT_DIRECTORY_LEVEL spte to add write permissions
(all direct sp's would be writeable and permissions would be controlled
at their parent_pte level). Of course that's a much bigger change than
this bug fix.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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