Secure AVIC accelerates EOI writes for edge-triggered interrupts.
For level-triggered interrupts, EOI msr write is forwarded to
hypervisor. Handle APIC_EOI msr write VMGEXIT and propagate EOI
writes to IOAPIC. Current implementation reuses unused host APIC_ISR
regs space to maintain information about active level-triggered
interrupts. As host APIC_TMR state is updated from IOAPIC redirect
entry, host APIC_TMR is used to identify level-triggered IOAPIC
interrupts.
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx>
---
arch/x86/kvm/lapic.h | 5 +++++
arch/x86/kvm/svm/sev.c | 26 ++++++++++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index a1367689d53c..4e41c7ea4f66 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -159,6 +159,11 @@ static inline void kvm_lapic_clear_vector(int vec, void *bitmap)
clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
}
+static inline int kvm_lapic_test_vector(int vec, void *bitmap)
+{
+ return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
+}
+
static inline void kvm_lapic_set_vector(int vec, void *bitmap)
{
set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 77c1ecebf677..a7e916891226 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -4491,9 +4491,27 @@ static void savic_handle_icr_write(struct kvm_vcpu *kvm_vcpu, u64 icr)
}
}
+static int find_highest_isr(struct kvm_lapic *apic)
+{
+ int vec_per_reg = 32;
+ int max_vec = 256;
+ u32 *reg;
+ int vec;
+
+ for (vec = max_vec - 32; vec >= 0; vec -= vec_per_reg) {
+ reg = apic->regs + APIC_ISR + REG_POS(vec);
+ if (*reg)
+ return __fls(*reg) + vec;
+ }
+
+ return -1;
+}
+
static bool savic_handle_msr_exit(struct kvm_vcpu *vcpu)
{
+ struct kvm_lapic *apic;
u32 msr, reg;
+ int vec;
msr = kvm_rcx_read(vcpu);
reg = (msr - APIC_BASE_MSR) << 4;
@@ -4512,6 +4530,12 @@ static bool savic_handle_msr_exit(struct kvm_vcpu *vcpu)
return true;
}
break;
+ case APIC_EOI:
+ apic = vcpu->arch.apic;
+ vec = find_highest_isr(apic);
+ kvm_lapic_clear_vector(vec, apic->regs + APIC_ISR);
+ kvm_apic_set_eoi_accelerated(vcpu, vec);
+ return true;
default:
break;
}
@@ -5294,6 +5318,8 @@ void sev_savic_set_requested_irr(struct vcpu_svm *svm, bool reinjected)
vec = (i << 5) + vec_pos;
kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR);
val = val & ~BIT(vec_pos);
+ if (kvm_lapic_test_vector(vec, apic->regs + APIC_TMR))
+ kvm_lapic_set_vector(vec, apic->regs + APIC_ISR);
} while (val);
}
--
2.34.1
