On 2/27/2025 4:48 AM, Sean Christopherson wrote:
> If the CPU supports Idle HLT, which elides HLT VM-Exits if the vCPU has an
> unmasked pending IRQ or NMI, relax the xAPIC IPI test's assertion on the
> number of HLT exits to only require that the number of exits is less than
> or equal to the number of HLT instructions that were executed. I.e. don't
> fail the test if Idle HLT does what it's supposed to do.
>
> Note, unfortunately there's no way to determine if *KVM* supports Idle HLT,
> as this_cpu_has() checks raw CPU support, and kvm_cpu_has() checks what can
> be exposed to L1, i.e. the latter would check if KVM supports nested Idle
> HLT. But, since the assert is purely bonus coverage, checking for CPU
> support is good enough.
>
> Cc: Manali Shukla <Manali.Shukla@xxxxxxx>
> Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> ---
> tools/testing/selftests/kvm/include/x86/processor.h | 1 +
> tools/testing/selftests/kvm/x86/xapic_ipi_test.c | 13 ++++++++++++-
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
> index 61578f038aff..32ab6ca7ec32 100644
> --- a/tools/testing/selftests/kvm/include/x86/processor.h
> +++ b/tools/testing/selftests/kvm/include/x86/processor.h
> @@ -200,6 +200,7 @@ struct kvm_x86_cpu_feature {
> #define X86_FEATURE_PAUSEFILTER KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 10)
> #define X86_FEATURE_PFTHRESHOLD KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 12)
> #define X86_FEATURE_VGIF KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 16)
> +#define X86_FEATURE_IDLE_HLT KVM_X86_CPU_FEATURE(0x8000000A, 0, EDX, 30)
> #define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1)
> #define X86_FEATURE_SEV_ES KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 3)
> #define X86_FEATURE_PERFMON_V2 KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
> diff --git a/tools/testing/selftests/kvm/x86/xapic_ipi_test.c b/tools/testing/selftests/kvm/x86/xapic_ipi_test.c
> index b255c7fbe519..35cb9de54a82 100644
> --- a/tools/testing/selftests/kvm/x86/xapic_ipi_test.c
> +++ b/tools/testing/selftests/kvm/x86/xapic_ipi_test.c
> @@ -466,7 +466,18 @@ int main(int argc, char *argv[])
> cancel_join_vcpu_thread(threads[0], params[0].vcpu);
> cancel_join_vcpu_thread(threads[1], params[1].vcpu);
>
> - TEST_ASSERT_EQ(data->hlt_count, vcpu_get_stat(params[0].vcpu, halt_exits));
> + /*
> + * If the host support Idle HLT, i.e. KVM *might* be using Idle HLT,
> + * then the number of HLT exits may be less than the number of HLTs
> + * that were executed, as Idle HLT elides the exit if the vCPU has an
> + * unmasked, pending IRQ (or NMI).
> + */
> + if (this_cpu_has(X86_FEATURE_IDLE_HLT))
> + TEST_ASSERT(data->hlt_count >= vcpu_get_stat(params[0].vcpu, halt_exits),
> + "HLT insns = %lu, HLT exits = %lu",
> + data->hlt_count, vcpu_get_stat(params[0].vcpu, halt_exits));
> + else
> + TEST_ASSERT_EQ(data->hlt_count, vcpu_get_stat(params[0].vcpu, halt_exits));
>
> fprintf(stderr,
> "Test successful after running for %d seconds.\n"
>
> base-commit: fed48e2967f402f561d80075a20c5c9e16866e53
Tested on Genoa and Turin systems to cover both scenarios: CPU supports idle HLT intercept
and CPU doesn't support idle HLT intercept.
Tested-by: Manali Shukla <Manali.Shukla@xxxxxxx>
