On Wed, 27 Nov 2024 15:56:27 -0800, Sean Christopherson wrote:
> In the PMU counters test, add a data load in the measured loop and target
> the data with CLFLUSH{OPT} in order to (try to) guarantee the loop
> generates LLC misses and fills. Per the SDM, some hardware prefetchers
> are allowed to omit relevant PMU events, and Emerald Rapids (and possibly
> Sapphire Rapids) appears to have gained an instruction prefetcher that
> bypasses event counts. E.g. the test will consistently fail on EMR CPUs,
> but then pass with seemingly benign changes to the code.
>
> [...]
Applied to kvm-x86 selftests, thanks!
[1/1] KVM: selftests: Use data load to trigger LLC references/misses in Intel PMU
https://github.com/kvm-x86/linux/commit/7803339fa929
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https://github.com/kvm-x86/linux/tree/next
