On 1/8/2025 1:35 PM, Borislav Petkov wrote:
> On Wed, Jan 08, 2025 at 01:17:11PM +0530, Nikunj A. Dadhania wrote:
>> diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
>> index 00a0ac3baab7..763cfeb65b2f 100644
>> --- a/arch/x86/coco/sev/core.c
>> +++ b/arch/x86/coco/sev/core.c
>> @@ -3218,7 +3218,8 @@ static int __init snp_get_tsc_info(void)
>>
>> void __init snp_secure_tsc_prepare(void)
>> {
>> - if (!cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC))
>> + if (!cc_platform_has(CC_ATTR_GUEST_SEV_SNP) ||
>> + !cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC))
>
> So how is moving the CC_ATTR_GUEST_SEV_SNP check here make any sense?
In the comment that you gave here[1], I understood that this check has
to be pushed to snp_secure_tsc_prepare().
diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
index 996ca27f0b72..95bae74fdab2 100644
--- a/arch/x86/mm/mem_encrypt.c
+++ b/arch/x86/mm/mem_encrypt.c
@@ -94,9 +94,7 @@ void __init mem_encrypt_init(void)
/* Call into SWIOTLB to update the SWIOTLB DMA buffers */
swiotlb_update_mem_attributes();
- /* Initialize SNP Secure TSC */
- if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))
- snp_secure_tsc_prepare();
+ snp_secure_tsc_prepare();
print_mem_encrypt_feature_info();
}
> I simply zapped the MSR_AMD64_SEV_SNP_ENABLED check above locally.
For SEV and SEV-ES this SecureTSC bit should not be set, I think we should be
fine without MSR_AMD64_SEV_SNP_ENABLED check.
Regards
Nikunj
1. https://lore.kernel.org/kvm/20241111103434.GAZzHduouKi4LBwbg8@fat_crate.local/
