Huacai,
On 2025/1/4 下午10:09, Huacai Chen wrote:
Hi, Bibo,
Any update on this?
Sorry for not update it in time.
This patch is basic memory relative, it is only test on 3A6000 with 4
cores. I hope it is fully tested on 3C6000 servers with numa support.
When new machines arrive and the test is done, I will refresh the patch.
Regards
Bibo Mao
Huacai
On Wed, Nov 13, 2024 at 11:17 AM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
LoongArch KVM hypervisor supports two-level MMU, vpid index is used
for stage1 MMU and vmid index is used for stage2 MMU.
On 3A5000, vmid must be the same with vpid. On 3A6000 platform vmid
may separate from vpid. There are such advantages if separate vpid
is supported.
1. One VM uses one vmid, vCPUs on the same VM can share the same vmid.
2. If one vCPU switch between different physical CPU, old vmid can be
still usefil if old vmid is not expired
3. For remote tlb flush, only vmid need update and vpid need not
update.
Here add separate vmid feature support, vmid feature detecting method
is not implemented since it depends on HW implementation, detecting
method will be added when HW is ready.
---
Bibo Mao (5):
LoongArch: KVM: Add vmid support for stage2 MMU
LoongArch: KVM: Add separate vmid feature support
LoongArch: KVM: implement vmid updating logic
LoongArch: KVM: Add remote tlb flushing support
LoongArch: KVM: Enable separate vmid feature
arch/loongarch/include/asm/kvm_host.h | 10 ++++
arch/loongarch/include/asm/loongarch.h | 2 +
arch/loongarch/kernel/asm-offsets.c | 1 +
arch/loongarch/kvm/main.c | 76 ++++++++++++++++++++++++--
arch/loongarch/kvm/mmu.c | 17 ++++++
arch/loongarch/kvm/switch.S | 5 +-
arch/loongarch/kvm/tlb.c | 19 ++++++-
arch/loongarch/kvm/vcpu.c | 7 ++-
8 files changed, 128 insertions(+), 9 deletions(-)
base-commit: 2d5404caa8c7bb5c4e0435f94b28834ae5456623
--
2.39.3
