On 2024/12/3 上午10:46, Huacai Chen wrote:
Hi, Bibo,
On Wed, Nov 13, 2024 at 11:17 AM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
LoongArch KVM hypervisor supports two-level MMU, vpid index is used
for stage1 MMU and vmid index is used for stage2 MMU.
On 3A5000, vmid must be the same with vpid. On 3A6000 platform vmid
may separate from vpid. If vcpu migrate to different physical CPUs,
vpid need change however vmid can keep the same with old value. Also
vmid index of the while VM machine on physical CPU the same, all vCPUs
on the VM can share the same vmid index on one physical CPU.
Here vmid index is added and it keeps the same with vpid still.
Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
---
arch/loongarch/include/asm/kvm_host.h | 3 +++
arch/loongarch/kernel/asm-offsets.c | 1 +
arch/loongarch/kvm/main.c | 1 +
arch/loongarch/kvm/switch.S | 5 ++---
arch/loongarch/kvm/tlb.c | 5 ++++-
5 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include/asm/kvm_host.h
index d6bb72424027..6151c7c470d5 100644
--- a/arch/loongarch/include/asm/kvm_host.h
+++ b/arch/loongarch/include/asm/kvm_host.h
@@ -166,6 +166,9 @@ struct kvm_vcpu_arch {
unsigned long host_tp;
unsigned long host_pgd;
+ /* vmid info for guest VM */
+ unsigned long vmid;
vmid is a member of kvm_vcpu_arch, no of kvm_arch?
As patch 3, there is such line
+ vcpu->arch.vmid = vcpu->kvm->arch.vmid[cpu] & vpid_mask;
It is the same. Adding a member in kvm_vcpu_arch is easy to
access kvm_vcpu_arch data structure in kvm context switch assemble
code. When switching to VM, vmid should be set. And vmid should be zero
when resume to host.
>> - csrrd t1, LOONGARCH_CSR_GSTAT
>> - bstrpick.w t1, t1, CSR_GSTAT_GID_SHIFT_END,
CSR_GSTAT_GID_SHIFT
>> + /* Set VMID for gpa --> hpa mapping */
>> + ld.d t1, a2, KVM_ARCH_VMID
>> csrrd t0, LOONGARCH_CSR_GTLBC
>> bstrins.w t0, t1, CSR_GTLBC_TGID_SHIFT_END,
CSR_GTLBC_TGID_SHIFT
+
/* Host CSRs are used when handling exits from guest */
unsigned long badi;
unsigned long badv;
diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/asm-offsets.c
index bee9f7a3108f..4e9a9311afd3 100644
--- a/arch/loongarch/kernel/asm-offsets.c
+++ b/arch/loongarch/kernel/asm-offsets.c
@@ -307,6 +307,7 @@ static void __used output_kvm_defines(void)
OFFSET(KVM_ARCH_HSP, kvm_vcpu_arch, host_sp);
OFFSET(KVM_ARCH_HTP, kvm_vcpu_arch, host_tp);
OFFSET(KVM_ARCH_HPGD, kvm_vcpu_arch, host_pgd);
+ OFFSET(KVM_ARCH_VMID, kvm_vcpu_arch, vmid);
OFFSET(KVM_ARCH_HANDLE_EXIT, kvm_vcpu_arch, handle_exit);
OFFSET(KVM_ARCH_HEENTRY, kvm_vcpu_arch, host_eentry);
OFFSET(KVM_ARCH_GEENTRY, kvm_vcpu_arch, guest_eentry);
diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c
index 27e9b94c0a0b..8c16bff80053 100644
--- a/arch/loongarch/kvm/main.c
+++ b/arch/loongarch/kvm/main.c
@@ -212,6 +212,7 @@ static void kvm_update_vpid(struct kvm_vcpu *vcpu, int cpu)
context->vpid_cache = vpid;
vcpu->arch.vpid = vpid;
I think vpid should also be:
vcpu->arch.vpid = vpid & vpid_mask;
yes, vpid should be similar with vmid. Will modify it in next round.
Regards
Bibo Mao
Huacai
+ vcpu->arch.vmid = vcpu->arch.vpid & vpid_mask;
}
void kvm_check_vpid(struct kvm_vcpu *vcpu)
diff --git a/arch/loongarch/kvm/switch.S b/arch/loongarch/kvm/switch.S
index 0c292f818492..2774343f64d3 100644
--- a/arch/loongarch/kvm/switch.S
+++ b/arch/loongarch/kvm/switch.S
@@ -72,9 +72,8 @@
ldx.d t0, t1, t0
csrwr t0, LOONGARCH_CSR_PGDL
- /* Mix GID and RID */
- csrrd t1, LOONGARCH_CSR_GSTAT
- bstrpick.w t1, t1, CSR_GSTAT_GID_SHIFT_END, CSR_GSTAT_GID_SHIFT
+ /* Set VMID for gpa --> hpa mapping */
+ ld.d t1, a2, KVM_ARCH_VMID
csrrd t0, LOONGARCH_CSR_GTLBC
bstrins.w t0, t1, CSR_GTLBC_TGID_SHIFT_END, CSR_GTLBC_TGID_SHIFT
csrwr t0, LOONGARCH_CSR_GTLBC
diff --git a/arch/loongarch/kvm/tlb.c b/arch/loongarch/kvm/tlb.c
index ebdbe9264e9c..38daf936021d 100644
--- a/arch/loongarch/kvm/tlb.c
+++ b/arch/loongarch/kvm/tlb.c
@@ -23,7 +23,10 @@ void kvm_flush_tlb_all(void)
void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa)
{
+ unsigned int vmid;
+
lockdep_assert_irqs_disabled();
gpa &= (PAGE_MASK << 1);
- invtlb(INVTLB_GID_ADDR, read_csr_gstat() & CSR_GSTAT_GID, gpa);
+ vmid = (vcpu->arch.vmid << CSR_GSTAT_GID_SHIFT) & CSR_GSTAT_GID;
+ invtlb(INVTLB_GID_ADDR, vmid, gpa);
}
--
2.39.3
