Newer AMD CPUs (Zen5+) have the ERAPS feature bit that allows us to remove the RSB filling loops required during context switches and VM exits. This patchset implements the feature to: * remove the need for RSB filling on context switches and VMEXITs in host and guests * allow KVM guests to use the full default RSB stack The feature isn't yet part of an APM update that details its working, so this is still tagged as RFC. The notes at https://amitshah.net/2024/11/eraps-reduces-software-tax-for-hardware-bugs/ may help follow along till the APM is public. v3: * rebase on top of Josh's RSB tweaks series * with that rebase, only the non-AutoIBRS case needs special ERAPS support. AutoIBRS is currently disabled when SEV-SNP is active (commit acaa4b5c4c8) * remove comment about RSB_CLEAR_LOOPS and the size of the RSB -- it's not necessary anymore with the rework * remove comment from patch 2 in svm.c in favour of the commit message v2: * reword comments to highlight context switch as the main trigger for RSB flushes in hardware (Dave Hansen) * Split out outdated comment updates in (v1) patch1 to be a standalone patch1 in this series, to reinforce RSB filling is only required for RSB poisoning cases for AMD * Remove mentions of BTC/BTC_NO (Andrew Cooper) * Add braces in case stmt (kernel test robot) * s/boot_cpu_has/cpu_feature_enabled (Boris Petkov) Amit Shah (2): x86: cpu/bugs: add AMD ERAPS support; hardware flushes RSB x86: kvm: svm: advertise ERAPS (larger RSB) support to guests Documentation/admin-guide/hw-vuln/spectre.rst | 5 ++-- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/svm.h | 6 +++- arch/x86/kernel/cpu/bugs.c | 6 +++- arch/x86/kvm/cpuid.c | 18 ++++++++++-- arch/x86/kvm/svm/svm.c | 29 +++++++++++++++++++ arch/x86/kvm/svm/svm.h | 15 ++++++++++ 7 files changed, 74 insertions(+), 6 deletions(-) -- 2.47.0
