On Thu, Aug 01, 2024, Mingwei Zhang wrote: > Excluding existing vLBR logic from the passthrough PMU because the it does > not support LBR related MSRs. So to avoid any side effect, do not call > vLBR related code in both vcpu_enter_guest() and pmi injection function. This is unnecessary. PMU_CAP_LBR_FMT will be cleared in kvm_caps.supported_perf_cap when the mediated PMU is enabled, which will prevent relevant bits from being set in the vCPU's PERF_CAPABILITIES, and that in turn will ensure the number of LBR records is always zero. If we wanted a sanity check, then it should go in intel_pmu_refresh(). But I don't think that's justified. E.g. legacy LBRs are incompatible with arch LBRs. At some point we have to rely on us not screwing up. A selftest for this though, that's a different story, but we already have coverage thanks to vmx_pmu_caps_test.c. If we wanted to be paranoid, that test could be extended to assert that LBRs are unsupported if the mediated PMU is enabled.
