On 06/09/2010 06:59 PM, Dong, Eddie wrote:
Besides VF IO interrupt and timer interrupt introduced performance overhead risk,
VF usually uses MSI
EOI message deliver from lapic to ioapic,
Only for non-MSI
which becomes in user land now, may have potential scalability issue. For example, if we have a 64 VCPU guest, if each vcpu has 1khz interrupt (or ipi), the EOI from guest will normally have to involve ioapic module for clearance in 64khz which may have long lock contentio.
No, EOI for IPI or for local APIC timer does not involve the IOAPIC.
you may reduce the involvement of ioapic eoi by tracking ioapic pin<-> vector map in kernel, but not sure if it is clean enough.
It's sufficient to look at TMR, no? For edge triggered I don't think we need the EOI.
But, the amount of churn and risk worries me, so I don't think the move is worthwhile.
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