On Wed, Nov 06, 2024, Chao Gao wrote: > >Furthermore, in addition to introducing this issue, commit 755c2bf87860 also > >papered over the underlying bug: KVM doesn't ensure CPUs and devices see APICv > >as disabled prior to searching the IRR. Waiting until KVM emulates EOI to update > >irr_pending works because KVM won't emulate EOI until after refresh_apicv_exec_ctrl(), > >and because there are plenty of memory barries in between, but leaving irr_pending > >set is basically hacking around bad ordering, which I _think_ can be fixed by: > > > >diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > >index 83fe0a78146f..85d330b56c7e 100644 > >--- a/arch/x86/kvm/x86.c > >+++ b/arch/x86/kvm/x86.c > >@@ -10548,8 +10548,8 @@ void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu) > > goto out; > > > > apic->apicv_active = activate; > >- kvm_apic_update_apicv(vcpu); > > kvm_x86_call(refresh_apicv_exec_ctrl)(vcpu); > >+ kvm_apic_update_apicv(vcpu); > > I may miss something important. how does this change ensure CPUs and devices see > APICv as disabled (thus won't manipulate the vCPU's IRR)? Other CPUs when > performing IPI virtualization just looks up the PID_table while IOMMU looks up > the IRTE table. ->refresh_apicv_exec_ctrl() doesn't change any of them. For Intel, which is a bug (one of many in this area). AMD does update both. The failure Maxim was addressing was on AMD (AVIC), which has many more scenarios where it needs to be inhibited/disabled.
