This splits the preparation works of the iommu and the Intel iommu driver out from the iommufd pasid attach/replace series. [1] To support domain replacement, the definition of the set_dev_pasid op needs to be enhanced. Meanwhile, the existing set_dev_pasid callbacks should be extended as well to suit the new definition. This series first passes the old domain to the set_dev_pasid op, and prepares the Intel iommu set_dev_pasid callbacks (paging domain, identity domain, and sva domain) for the new definition, add the missing set_dev_pasid callback for the nested domain, makes ARM SMMUv3 set_dev_pasid op to suit the new set_dev_pasid op definition, and in the end, claims the set_dev_pasid op support domain replacement. The AMD set_dev_pasid callback is extended to fail if the caller tries to do the domain replacement to meet the new definition of set_dev_pasid op. AMD iommu driver would support it later per Vasant [2]. [1] https://lore.kernel.org/linux-iommu/20240412081516.31168-1-yi.l.liu@xxxxxxxxx/ [2] https://lore.kernel.org/linux-iommu/fa9c4fc3-9365-465e-8926-b4d2d6361b9c@xxxxxxx/ v4: - Fix a missing input argument modification in patch 01 (Nicolin) - Per Baolu's suggestion, this series does not extend the pasid setup helpers to handle domain replacement, instead it adds pasid replace helpers, hence drop patch 02 of v3 as it is no longer required in this series. - Add a new helper to consolidate the cache flush for the modifications to a present pasid entry (the fields other than P and SSADE) (Baolu) - Update the set_dev_pasid op of intel identity domain to handle replacement - Consolidate the dev_pasid_info code of intel_svm_set_dev_pasid() - Add a separate set_dev_pasid callback for nested domain instead of sharing intel_iommu_set_dev_pasid() (Baolu) - Drop patch 05 of v3 as Baolu has another patch that touches it. v3: https://lore.kernel.org/linux-iommu/20241018055402.23277-1-yi.l.liu@xxxxxxxxx/ - Add Kevin and Jason's r-b to patch 01, 02, 04, 05 and 06 of v2 - Add back the patch 03 of v1 to make the pasid setup helpers do all the pasid entry modification, hence the set_dev_pasid path is really rollback-less, which is spotted by Baolu. - Rename prepare_domain_attach_device() (Baolu) - Use unsigned int instead of u32 for flags (Baolu) - Remove a stale comment in arm_smmu_set_pasid (Will) v2: https://lore.kernel.org/linux-iommu/20240912130427.10119-1-yi.l.liu@xxxxxxxxx/ - Make ARM SMMUv3 set_dev_pasid op support domain replacement (Jason) - Drop patch 03 of v1 (Kevin) - Multiple tweaks in VT-d driver (Kevin) v1: https://lore.kernel.org/linux-iommu/20240628085538.47049-1-yi.l.liu@xxxxxxxxx/ Regards, Yi Liu Jason Gunthorpe (1): iommu/arm-smmu-v3: Make set_dev_pasid() op support replace Lu Baolu (1): iommu/vt-d: Add set_dev_pasid callback for nested domain Yi Liu (11): iommu: Pass old domain to set_dev_pasid op iommu/vt-d: Add a helper to flush cache for updating present pasid entry iommu/vt-d: Refactor the pasid setup helpers iommu/vt-d: Add pasid replace helpers iommu/vt-d: Prepare intel_iommu_set_dev_pasid() handle replacement iommu/vt-d: Make intel_iommu_set_dev_pasid() to handle domain replacement iommu/vt-d: Limit intel_iommu_set_dev_pasid() for paging domain iommu/vt-d: Make identity_domain_set_dev_pasid() to handle domain replacement iommu/vt-d: Consolidate the dev_pasid code in intel_svm_set_dev_pasid() iommu/vt-d: Fail SVA domain replacement iommu: Make set_dev_pasid op support domain replacement drivers/iommu/amd/amd_iommu.h | 3 +- drivers/iommu/amd/pasid.c | 6 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 5 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 12 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 +- drivers/iommu/intel/iommu.c | 137 +++++-- drivers/iommu/intel/iommu.h | 13 + drivers/iommu/intel/nested.c | 43 ++ drivers/iommu/intel/pasid.c | 374 ++++++++++++++---- drivers/iommu/intel/pasid.h | 43 ++ drivers/iommu/intel/svm.c | 32 +- drivers/iommu/iommu.c | 3 +- include/linux/iommu.h | 5 +- 13 files changed, 530 insertions(+), 148 deletions(-) -- 2.34.1
