From: Yong He <alexyonghe@xxxxxxxxxxx> When running function loading inside VM without EPT supported, we found shadow page table rebuilds are very frequent even only 3 process running inside VM, such as kvm_mmu_free_roots if invoked frequently. PTI is enabled inside our VM, so 3 process will have 6 valid CR3s, but there are only 3 LRU cache of previous CR3s, so this made the cache is always invalid, and the shadow page table is frequently rebuilt. In this patch we enlarge the number of LRU cache, and introduce a parameter for it, so that user could enlarge the cache when needed. Here is context switch latency test of lmbench3, run in Ice lake server, after enlarge the LRU cache number, the switch latency reduced 14%~18%. process number 2 3 4 5 6 7 8 LRU cache = 3 4.857 6.802 7.518 7.836 7.770 7.287 7.271 LRU cache = 11 4.654 5.518 6.292 6.516 6.512 7.135 7.270 Also, the kvm_mmu_free_roots reduced from 7k+ to 60, when running the latency test with 4 processes. Yong He (2): KVM: x86: expand the LRU cache of previous CR3s KVM: x86: introduce cache configurations for previous CR3s arch/x86/include/asm/kvm_host.h | 7 +++--- arch/x86/kvm/mmu.h | 1 + arch/x86/kvm/mmu/mmu.c | 40 +++++++++++++++++++++++---------- arch/x86/kvm/vmx/nested.c | 4 ++-- arch/x86/kvm/x86.c | 2 +- 5 files changed, 36 insertions(+), 18 deletions(-) -- 2.43.5
