The macros fpu_reg_{read,write} post-increment the '__val'
pointer register as a part of 'stp' and 'ldp' instructions.
As a result, mark it with "+r" for the compiler to treat it
as read-write operand.
On the contrary, sve_reg_read() never updates the value of the
pointer/register. Hence, mark this as "r" for the compiler to
treat it as read-only operand.
Without these adjustments, the compiler can potentially perform
optimizations over the registers holding the pointers that could
lead to data aborts.
Fixes: d47d370c8f ("arm: Add test for FPU/SIMD context save/restore")
Signed-off-by: Raghavendra Rao Ananta <rananta@xxxxxxxxxx>
---
arm/fpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arm/fpu.c b/arm/fpu.c
index f327a349..f44ed82a 100644
--- a/arm/fpu.c
+++ b/arm/fpu.c
@@ -55,7 +55,7 @@ static inline bool arch_collect_entropy(uint64_t *random)
"stp q26, q27, [%0], #32\n\t" \
"stp q28, q29, [%0], #32\n\t" \
"stp q30, q31, [%0], #32\n\t" \
- : "=r" (__val) \
+ : "+r" (__val) \
: \
: "v0", "v1", "v2", "v3", \
"v4", "v5", "v6", "v7", \
@@ -89,8 +89,8 @@ do { \
"ldp q26, q27, [%0], #32\n\t" \
"ldp q28, q29, [%0], #32\n\t" \
"ldp q30, q31, [%0], #32\n\t" \
+ : "+r" (__val) \
: \
- : "r" (__val) \
: "v0", "v1", "v2", "v3", \
"v4", "v5", "v6", "v7", \
"v8", "v9", "v10", "v11", \
@@ -140,8 +140,8 @@ do { \
"str z29, [%0, #29, MUL VL]\n" \
"str z30, [%0, #30, MUL VL]\n" \
"str z31, [%0, #31, MUL VL]\n" \
- : "=r" (__val) \
: \
+ : "r" (__val) \
: "z0", "z1", "z2", "z3", \
"z4", "z5", "z6", "z7", \
"z8", "z9", "z10", "z11", \
--
2.47.0.105.g07ac214952-goog
