On 17/10/2024 18.44, Jonathan Cameron wrote:
> External email: Use caution opening links or attachments
>
>
> On Fri, 20 Sep 2024 15:34:35 -0700
> Zhi Wang <zhiw@xxxxxxxxxx> wrote:
>
>> CXL core has the information of what CXL register groups a device has.
>> When initializing the device, the CXL core probes the register groups
>> and saves the information. The probing sequence is quite complicated.
>>
>> vfio-cxl requires the HDM register information to emualte the HDM decoder
> Hi Zhi,
>
> I know these were a bit rushed out so I'll only comment once.
> Give your patch descriptions a spell check (I always forget :)
> emulate
>
Thanks for pointing it out. Will proceed. Lol. Me the same. I write a
script of sending patches that ask for confirming every item was in the
checklist now.
>> registers.
>>
>> Introduce cxl_get_hdm_info() for vfio-cxl to leverage the HDM
>> register information in the CXL core. Thus, it doesn't need to implement
>> its own probing sequence.
>>
>> Signed-off-by: Zhi Wang <zhiw@xxxxxxxxxx>
>> ---
>> drivers/cxl/core/pci.c | 28 ++++++++++++++++++++++++++++
>> drivers/cxl/cxlpci.h | 3 +++
>> include/linux/cxl_accel_mem.h | 2 ++
>> 3 files changed, 33 insertions(+)
>>
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index a663e7566c48..7b6c2b6211b3 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -502,6 +502,34 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,
>> }
>> EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, CXL);
>>
>> +int cxl_get_hdm_info(struct cxl_dev_state *cxlds, u32 *hdm_count,
>> + u64 *hdm_reg_offset, u64 *hdm_reg_size)
>> +{
>> + struct pci_dev *pdev = to_pci_dev(cxlds->dev);
>> + int d = cxlds->cxl_dvsec;
>> + u16 cap;
>> + int rc;
>> +
>> + if (!cxlds->reg_map.component_map.hdm_decoder.valid) {
>> + *hdm_reg_offset = *hdm_reg_size = 0;
> Probably want to zero out the hdm_count as well?
>
>> + } else {
>> + struct cxl_component_reg_map *map =
>> + &cxlds->reg_map.component_map;
>> +
>> + *hdm_reg_offset = map->hdm_decoder.offset;
>> + *hdm_reg_size = map->hdm_decoder.size;
>> + }
>> +
>> + rc = pci_read_config_word(pdev,
>> + d + CXL_DVSEC_CAP_OFFSET, &cap);
>> + if (rc)
>> + return rc;
>> +
>> + *hdm_count = FIELD_GET(CXL_DVSEC_HDM_COUNT_MASK, cap);
>> + return 0;
>> +}
>> +EXPORT_SYMBOL_NS_GPL(cxl_get_hdm_info, CXL);
