On Tue, Oct 15, 2024 at 12:12:51PM +0200, Jürgen Groß wrote: > On 15.10.24 11:58, Kirill A. Shutemov wrote: > > AMD SEV-SNP and Intel TDX have limited access to MTRR: either it is not > > advertised in CPUID or it cannot be programmed (on TDX, due to #VE on > > CR0.CD clear). > > > > This results in guests using uncached mappings where it shouldn't and > > pmd/pud_set_huge() failures due to non-uniform memory type reported by > > mtrr_type_lookup(). > > > > Override MTRR state, making it WB by default as the kernel does for > > Hyper-V guests. > > > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > > Suggested-by: Binbin Wu <binbin.wu@xxxxxxxxx> > > Cc: Juergen Gross <jgross@xxxxxxxx> > > Cc: Tom Lendacky <thomas.lendacky@xxxxxxx> > > --- > > arch/x86/kernel/kvm.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c > > index 263f8aed4e2c..21e9e4845354 100644 > > --- a/arch/x86/kernel/kvm.c > > +++ b/arch/x86/kernel/kvm.c > > @@ -37,6 +37,7 @@ > > #include <asm/apic.h> > > #include <asm/apicdef.h> > > #include <asm/hypervisor.h> > > +#include <asm/mtrr.h> > > #include <asm/tlb.h> > > #include <asm/cpuidle_haltpoll.h> > > #include <asm/ptrace.h> > > @@ -980,6 +981,9 @@ static void __init kvm_init_platform(void) > > } > > kvmclock_init(); > > x86_platform.apic_post_init = kvm_apic_init; > > + > > + /* Set WB as the default cache mode for SEV-SNP and TDX */ > > + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK); > > Do you really want to do this for _all_ KVM guests? > > I'd expect this call to be conditional on TDX or SEV-SNP. mtrr_overwrite_state() checks it internally. -- Kiryl Shutsemau / Kirill A. Shutemov
