[GIT PULL] KVM: x86: Misc changes for 6.12

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The highlight is a rework of the userspace MSR access code to automatically
suppress errors on disallowed accesses to advertised-but-unsupported MSRs.
Unfortunately, actually removing all of the !host_initiated exemptions in KVM
is decidely non-trivial, so realizing most the benefits will have to wait
(though this should make life much easier for CET enabling).

The lowlight is a rework of the x2APIC ICR handling.  KVM jumped through hoops
to deal with Intel CPUs storing the full 64-bit value at the ICR offset in the
vAPIC page, and then AMD (x2AVIC) came along and continued to split the value
to the legacy ICR and ICR2 offsets.  *sigh*

The following changes since commit 47ac09b91befbb6a235ab620c32af719f8208399:

  Linux 6.11-rc4 (2024-08-18 13:17:27 -0700)

are available in the Git repository at:

  https://github.com/kvm-x86/linux.git tags/kvm-x86-misc-6.12

for you to fetch changes up to 4ca077f26d885cbc97e742a5f3572aac244a0f8a:

  KVM: x86: Remove some unused declarations (2024-09-09 20:12:43 -0700)

----------------------------------------------------------------
KVM x86 misc changes for 6.12

 - Advertise AVX10.1 to userspace (effectively prep work for the "real" AVX10
   functionality that is on the horizon).

 - Rework common MSR handling code to suppress errors on userspace accesses to
   unsupported-but-advertised MSRs.  This will allow removing (almost?) all of
   KVM's exemptions for userspace access to MSRs that shouldn't exist based on
   the vCPU model (the actual cleanup is non-trivial future work).

 - Rework KVM's handling of x2APIC ICR, again, because AMD (x2AVIC) splits the
   64-bit value into the legacy ICR and ICR2 storage, whereas Intel (APICv)
   stores the entire 64-bit value a the ICR offset.

 - Fix a bug where KVM would fail to exit to userspace if one was triggered by
   a fastpath exit handler.

 - Add fastpath handling of HLT VM-Exit to expedite re-entering the guest when
   there's already a pending wake event at the time of the exit.

 - Finally fix the RSM vs. nested VM-Enter WARN by forcing the vCPU out of
   guest mode prior to signalling SHUTDOWN (architecturally, the SHUTDOWN is
   supposed to hit L1, not L2).

----------------------------------------------------------------
Li Chen (1):
      KVM: x86: Use this_cpu_ptr() in kvm_user_return_msr_cpu_online

Sean Christopherson (26):
      KVM: SVM: Disallow guest from changing userspace's MSR_AMD64_DE_CFG value
      KVM: x86: Move MSR_TYPE_{R,W,RW} values from VMX to x86, as enums
      KVM: x86: Rename KVM_MSR_RET_INVALID to KVM_MSR_RET_UNSUPPORTED
      KVM: x86: Refactor kvm_x86_ops.get_msr_feature() to avoid kvm_msr_entry
      KVM: x86: Rename get_msr_feature() APIs to get_feature_msr()
      KVM: x86: Refactor kvm_get_feature_msr() to avoid struct kvm_msr_entry
      KVM: x86: Funnel all fancy MSR return value handling into a common helper
      KVM: x86: Hoist x86.c's global msr_* variables up above kvm_do_msr_access()
      KVM: x86: Suppress failures on userspace access to advertised, unsupported MSRs
      KVM: x86: Suppress userspace access failures on unsupported, "emulated" MSRs
      KVM: x86: Enforce x2APIC's must-be-zero reserved ICR bits
      KVM: x86: Move x2APIC ICR helper above kvm_apic_write_nodecode()
      KVM: x86: Re-split x2APIC ICR into ICR+ICR2 for AMD (x2AVIC)
      KVM: selftests: Open code vcpu_run() equivalent in guest_printf test
      KVM: selftests: Report unhandled exceptions on x86 as regular guest asserts
      KVM: selftests: Add x86 helpers to play nice with x2APIC MSR #GPs
      KVM: selftests: Skip ICR.BUSY test in xapic_state_test if x2APIC is enabled
      KVM: selftests: Test x2APIC ICR reserved bits
      KVM: selftests: Verify the guest can read back the x2APIC ICR it wrote
      KVM: selftests: Play nice with AMD's AVIC errata
      KVM: x86: Re-enter guest if WRMSR(X2APIC_ICR) fastpath is successful
      KVM: x86: Dedup fastpath MSR post-handling logic
      KVM: x86: Exit to userspace if fastpath triggers one on instruction skip
      KVM: x86: Reorganize code in x86.c to co-locate vCPU blocking/running helpers
      KVM: x86: Add fastpath handling of HLT VM-Exits
      KVM: x86: Forcibly leave nested if RSM to L2 hits shutdown

Tao Su (1):
      KVM: x86: Advertise AVX10.1 CPUID to userspace

Thorsten Blum (1):
      KVM: x86: Optimize local variable in start_sw_tscdeadline()

Yue Haibing (1):
      KVM: x86: Remove some unused declarations

 arch/x86/include/asm/cpuid.h                       |   1 +
 arch/x86/include/asm/kvm-x86-ops.h                 |   2 +-
 arch/x86/include/asm/kvm_host.h                    |   5 +-
 arch/x86/kvm/cpuid.c                               |  30 +-
 arch/x86/kvm/lapic.c                               |  75 +-
 arch/x86/kvm/lapic.h                               |   1 -
 arch/x86/kvm/mmu.h                                 |   2 -
 arch/x86/kvm/mmu/mmu_internal.h                    |   2 -
 arch/x86/kvm/reverse_cpuid.h                       |   8 +
 arch/x86/kvm/smm.c                                 |  24 +-
 arch/x86/kvm/svm/svm.c                             |  44 +-
 arch/x86/kvm/vmx/main.c                            |   4 +-
 arch/x86/kvm/vmx/vmx.c                             |  10 +-
 arch/x86/kvm/vmx/vmx.h                             |   4 -
 arch/x86/kvm/vmx/x86_ops.h                         |   2 +-
 arch/x86/kvm/x86.c                                 | 841 +++++++++++----------
 arch/x86/kvm/x86.h                                 |  28 +-
 tools/testing/selftests/kvm/guest_print_test.c     |  19 +-
 tools/testing/selftests/kvm/include/x86_64/apic.h  |  21 +-
 tools/testing/selftests/kvm/lib/x86_64/processor.c |   8 +-
 .../selftests/kvm/x86_64/xapic_state_test.c        |  54 +-
 21 files changed, 681 insertions(+), 504 deletions(-)




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