RE: [PATCH v5 07/10] KVM: arm64: Treat CTR_EL0 as a VM feature ID register

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Hi Oliver/Sebastian,

> -----Original Message-----
> From: Oliver Upton <oliver.upton@xxxxxxxxx>
> Sent: Wednesday, June 19, 2024 6:41 PM
> To: kvmarm@xxxxxxxxxxxxxxx
> Cc: Marc Zyngier <maz@xxxxxxxxxx>; James Morse
> <james.morse@xxxxxxx>; Suzuki K Poulose <suzuki.poulose@xxxxxxx>;
> yuzenghui <yuzenghui@xxxxxxxxxx>; kvm@xxxxxxxxxxxxxxx; Sebastian Ott
> <sebott@xxxxxxxxxx>; Shaoqin Huang <shahuang@xxxxxxxxxx>; Eric Auger
> <eric.auger@xxxxxxxxxx>; Oliver Upton <oliver.upton@xxxxxxxxx>
> Subject: [PATCH v5 07/10] KVM: arm64: Treat CTR_EL0 as a VM feature ID
> register

[...] 
 
> @@ -2487,7 +2490,10 @@ static const struct sys_reg_desc sys_reg_descs[] =
> {
>  	{ SYS_DESC(SYS_CCSIDR2_EL1), undef_access },
>  	{ SYS_DESC(SYS_SMIDR_EL1), undef_access },
>  	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown,
> CSSELR_EL1 },
> -	{ SYS_DESC(SYS_CTR_EL0), access_ctr },
> +	ID_WRITABLE(CTR_EL0, CTR_EL0_DIC_MASK |
> +			     CTR_EL0_IDC_MASK |
> +			     CTR_EL0_DminLine_MASK |
> +			     CTR_EL0_IminLine_MASK),

(Sorry if this was discussed earlier, but I couldn't locate it anywhere.)

Is there a reason why we can't make the L1Ip writable as well here?
We do have hardware that reports VIPT and PIPT for L11p.

The comment here states,
https://elixir.bootlin.com/linux/v6.11-rc7/source/arch/arm64/kernel/cpufeature.c#L489

" If we have differing I-cache policies, report it as the weakest - VIPT."

Does this also mean it is safe to downgrade the PIPT to VIPT for Guest as well?

Please let me know.

Thanks,
Shameer







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