On Tue, Aug 27, 2024 at 04:25:06PM +0100, Marc Zyngier wrote: > It recently appeared that, when running on a GICv3-equipped platform > (which is what non-ancient arm64 HW has), *not* configuring a GICv3 > for the guest could result in less than desirable outcomes. > > We have multiple issues to fix: > > - for registers that *always* trap (the SGI registers) or that *may* > trap (the SRE register), we need to check whether a GICv3 has been > instantiated before acting upon the trap. > > - for registers that only conditionally trap, we must actively trap > them even in the absence of a GICv3 being instantiated, and handle > those traps accordingly. > > - finally, ID registers must reflect the absence of a GICv3, so that > we are consistent. > > This series goes through all these requirements. The main complexity > here is to apply a GICv3 configuration on the host in the absence of a > GICv3 in the guest. This is pretty hackish, but I don't have a much > better solution so far. LGTM, thanks for respinning. Reviewed-by: Oliver Upton <oliver.upton@xxxxxxxxx> -- Thanks, Oliver
