Hi Sean, Thank you for reviewing my patches. On 8/17/2024 1:07 AM, Sean Christopherson wrote: > On Tue, Jul 09, 2024, Manali Shukla wrote: >> Malicious guests can cause bus locks to degrade the performance of > > I would say "misbehaving", I bet the overwhelming majority of bus locks in practice > are due to legacy/crusty software, not malicious software. > Ack. >> a system. Non-WB(write-back) and misaligned locked >> RMW(read-modify-write) instructions are referred to as "bus locks" and >> require system wide synchronization among all processors to guarantee >> atomicity. The bus locks may incur significant performance penalties >> for all processors in the system. >> >> The Bus Lock Threshold feature proves beneficial for hypervisors >> seeking to restrict guests' ability to initiate numerous bus locks, >> thereby preventing system slowdowns that affect all tenants. > > None of this actually says what the feature does. > Sure I will rewrite the commit message. >> Presence of the Bus Lock threshold feature is indicated via CPUID >> function 0x8000000A_EDX[29] >> >> Signed-off-by: Manali Shukla <manali.shukla@xxxxxxx> >> --- >> arch/x86/include/asm/cpufeatures.h | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h >> index 3c7434329661..10f397873790 100644 >> --- a/arch/x86/include/asm/cpufeatures.h >> +++ b/arch/x86/include/asm/cpufeatures.h >> @@ -381,6 +381,7 @@ >> #define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* Virtual SPEC_CTRL */ >> #define X86_FEATURE_VNMI (15*32+25) /* Virtual NMI */ >> #define X86_FEATURE_SVME_ADDR_CHK (15*32+28) /* "" SVME addr check */ >> +#define X86_FEATURE_BUS_LOCK_THRESHOLD (15*32+29) /* "" Bus lock threshold */ > > I would strongly prefer to enumerate this in /proc/cpuinfo, having to manually > query CPUID to see if a CPU supports a feature I want to test is beyond annoying. I will do the modifications accordingly. > >> /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ >> #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ >> >> base-commit: 704ec48fc2fbd4e41ec982662ad5bf1eee33eeb2 >> -- >> 2.34.1 >> - Manali
