On 2024/8/16 20:52, Jason Gunthorpe wrote:
On Fri, Aug 16, 2024 at 05:31:31PM +0530, Vasant Hegde wrote:
I see. So AMD side also has a gap. Is it easy to make it suit Jason's
suggestion in the above?
We can do that. We can enable ATS, PRI and PASID capability during probe time
and keep it enabled always.
I don't see a downside to enabling PASID at probe time, it exists to
handshake with the device if the root complex is able to understand
PASID TLPs.
SMMU3 calls
arm_smmu_probe_device
arm_smmu_enable_pasid
pci_enable_pasid
So it looks Ok
I made a patch for the Intel driver.
https://lore.kernel.org/linux-iommu/20240816104945.97160-1-baolu.lu@xxxxxxxxxxxxxxx/
Thanks,
baolu
