On 2024/8/12 19:35, Jason Gunthorpe wrote:
On Mon, Aug 12, 2024 at 05:03:37PM +0800, Yi Liu wrote:
The PASID may require ATS to be enabled (ie SVA), but the RID may be
IDENTITY for performance. The poor device has no idea it is not
allowed to use ATS on the RID side :(
If this is the only problematic case, the intel iommu driver in this
patch could check the scalable mode before enabling ATS in the
probe_device() op. In this way, the legacy mode iommu would keep the old
ATS enable policy.
At some point we will need to address this.. At least when we add
PASID support to mlx5 it will need something since mlx5 is using ATS
on the RID right now.
Supporting ATS with the IDENTITY optimization is a good idea in the
IOMMU HW. The HW just has to answer the ATS with a 1:1 TA.
looks like Intel scalable mode would allow ATS work even device uses
IDENTITY. Below is what spec says when PGTT is PT.
Chapter 9.6:
Untranslated/Translation Requests (with or without PASID) referencing this
scalable-mode PASID Table Entry bypass address translation and are
processed as pass-through.
Next, telling the driver that ATS is enabled but doesn't work on the
RID would allow the driver to deal with it
Finally, doing things like using IDENTITY through a paging domain
would be a last resort for troubled devices.
yep. It's another issue then.
--
Regards,
Yi Liu
