From: Sandipan Das <sandipan.das@xxxxxxx>
Add all PMU-related MSRs (including legacy K7 MSRs) to the list of
possible direct access MSRs. Most of them will not be intercepted when
using passthrough PMU.
Signed-off-by: Sandipan Das <sandipan.das@xxxxxxx>
Signed-off-by: Mingwei Zhang <mizhang@xxxxxxxxxx>
---
arch/x86/kvm/svm/svm.c | 24 ++++++++++++++++++++++++
arch/x86/kvm/svm/svm.h | 2 +-
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index fc78f34832ca..ff07f6ee867a 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -141,6 +141,30 @@ static const struct svm_direct_access_msrs {
{ .index = X2APIC_MSR(APIC_TMICT), .always = false },
{ .index = X2APIC_MSR(APIC_TMCCT), .always = false },
{ .index = X2APIC_MSR(APIC_TDCR), .always = false },
+ { .index = MSR_K7_EVNTSEL0, .always = false },
+ { .index = MSR_K7_PERFCTR0, .always = false },
+ { .index = MSR_K7_EVNTSEL1, .always = false },
+ { .index = MSR_K7_PERFCTR1, .always = false },
+ { .index = MSR_K7_EVNTSEL2, .always = false },
+ { .index = MSR_K7_PERFCTR2, .always = false },
+ { .index = MSR_K7_EVNTSEL3, .always = false },
+ { .index = MSR_K7_PERFCTR3, .always = false },
+ { .index = MSR_F15H_PERF_CTL0, .always = false },
+ { .index = MSR_F15H_PERF_CTR0, .always = false },
+ { .index = MSR_F15H_PERF_CTL1, .always = false },
+ { .index = MSR_F15H_PERF_CTR1, .always = false },
+ { .index = MSR_F15H_PERF_CTL2, .always = false },
+ { .index = MSR_F15H_PERF_CTR2, .always = false },
+ { .index = MSR_F15H_PERF_CTL3, .always = false },
+ { .index = MSR_F15H_PERF_CTR3, .always = false },
+ { .index = MSR_F15H_PERF_CTL4, .always = false },
+ { .index = MSR_F15H_PERF_CTR4, .always = false },
+ { .index = MSR_F15H_PERF_CTL5, .always = false },
+ { .index = MSR_F15H_PERF_CTR5, .always = false },
+ { .index = MSR_AMD64_PERF_CNTR_GLOBAL_CTL, .always = false },
+ { .index = MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, .always = false },
+ { .index = MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, .always = false },
+ { .index = MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET, .always = false },
{ .index = MSR_INVALID, .always = false },
};
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 0f1472690b59..d096b405c9f3 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -30,7 +30,7 @@
#define IOPM_SIZE PAGE_SIZE * 3
#define MSRPM_SIZE PAGE_SIZE * 2
-#define MAX_DIRECT_ACCESS_MSRS 48
+#define MAX_DIRECT_ACCESS_MSRS 72
#define MSRPM_OFFSETS 32
extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
extern bool npt_enabled;
--
2.46.0.rc1.232.g9752f9e123-goog
