Recently we came up upon a failure where likely the guest writes 0xff4547ceb1600000 to MSR_KERNEL_GS_BASE and later on, qemu sets this value via KVM_PUT_MSRS, and is rejected by the kernel, likely due to not being canonical in 4 level paging. I did some reverse engineering and to my surprise I found out that both Intel and AMD have very loose checks in regard to non canonical addresses written to this and several other msrs, when the CPU supports 5 level paging. Patch #1 addresses this, making KVM tolerate this. Patch #2 is just a fix for a semi theoretical bug, found while trying to debug the issue. Best regards, Maxim Levitsky Maxim Levitsky (2): KVM: x86: relax canonical checks for some x86 architectural msrs KVM: SVM: fix emulation of msr reads/writes of MSR_FS_BASE and MSR_GS_BASE arch/x86/kvm/svm/svm.c | 12 ++++++++++++ arch/x86/kvm/x86.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-) -- 2.26.3