On 2024/7/5 上午11:19, Jiaxun Yang wrote:
在2024年7月5日七月 上午9:21，maobibo写道：
[...]
for you.
On the other hand, can you list benefits or disadvantage of approaches
on different architecture?
So the obvious benefit of scratch vCPU would be maintaining consistency and simpleness
for UAPI.
I do not find the simpleness, for the same feature function, both VM
feature and CPU feature is define as follows. Do you think it is for
simple :)
VM CAPBILITY:
KVM_CAP_ARM_PTRAUTH_ADDRESS
KVM_CAP_ARM_PTRAUTH_GENERIC
KVM_CAP_ARM_EL1_32BIT
KVM_CAP_ARM_PMU_V3
KVM_CAP_ARM_SVE
KVM_CAP_ARM_PSCI
KVM_CAP_ARM_PSCI_0_2
CPU:
KVM_ARM_VCPU_POWER_OFF
KVM_ARM_VCPU_EL1_32BIT
KVM_ARM_VCPU_PSCI_0_2
KVM_ARM_VCPU_PMU_V3
KVM_ARM_VCPU_SVE
KVM_ARM_VCPU_PTRAUTH_ADDRESS
KVM_ARM_VCPU_PTRAUTH_GENERIC
KVM_ARM_VCPU_HAS_EL2
Also why scratch vcpu is created and tested on host cpu type rather than
other cpu type? It wastes much time for host cpu type to detect capability.
It can also maximum code reuse probabilities in other user space hypervisor projects.
Also, it can benefit a potential asymmetrical system. I understand that it won't appear
in near future, but we should always be prepared, especially in UAPI design.
If for potential asymmetrical system, however there is only one scratch
vcpu. is that right? how does only one scratch vcpu detect ASMP
capability, and it is not bind to physical cpu to detect ASMP capability.
In generic big.little is HMP rather than ASMP, are you agree.
Or you post patch about host cpu support, I list its disadvantage. Or I
post patch about host cpu support with scheduled time, then we talk
about it. Is that fair for you?
I'm not committed to development work, I can try, but I can't promise.
Regarding the fairness, IMO that's not how community works. If you observe reviewing
process happening all the place, it's always about addressing other's concern.
Still, it's up to maintainers to decide what's reasonable, I'm just trying to help.
yes I agree. I and Tianrui are maintainer also, we write all the kvm
loongarch code. We are familiar with it from the beginning.
Regards
Bibo Mao
It is unfair that you list some approaches and let others spend time to
do, else you are my top boss :)
I mean, I'm just trying to make some progress here. I saw you have some disagreement
with Huacai.
I know QEMU side implementation better than Huacai, so I'm trying to propose a solution
that would address Huacai's concern and may work for you.
I understand you may have some plans in your mind, please elaborate so
we can smash
them together. That's how community work.
For host cpu type or migration feature detection, I have no idea now,
also I do not think it will be big issue for me, I will do it with
scheduled time. Of source, welcome Jiaxun and you to implement host
cpu type or migration feature detection.
My concern is if you allow CPU features to have "auto" property you are
risking create
inconsistency among migration. Once you've done that it's pretty hard to
get rid of it.
Please check how RISC-V dealing with CPU features at QMP side.We are working on
I'm not meant to hinder your development work, but we should always
think ahead.
Yes, it is potential issue and we will solve it. Another potential issue
is that PV features may different on host, you cannot disable PV
features directly. The best way is that you post patch about it, then
we can talk about together, else it may be kindly reminder, also may be
waste of time, everyone is busy working for boss :)
Sigh, so you meant you submitted something known to be problematic?
