Re: [PATCH v3 3/3] KVM: SEV-ES: Fix LBRV code

Tom Lendacky <thomas.lendacky@xxxxxxx> · Thu, 30 May 2024 09:03:37 -0500

On 5/23/24 07:18, Ravi Bangoria wrote:
As documented in APM[1], LBR Virtualization must be enabled for SEV-ES
guests. Although KVM currently enforces LBRV for SEV-ES guests, there
are multiple issues with it:

o MSR_IA32_DEBUGCTLMSR is still intercepted. Since MSR_IA32_DEBUGCTLMSR
   interception is used to dynamically toggle LBRV for performance reasons,
   this can be fatal for SEV-ES guests. For ex SEV-ES guest on Zen3:

   [guest ~]# wrmsr 0x1d9 0x4
   KVM: entry failed, hardware error 0xffffffff
   EAX=00000004 EBX=00000000 ECX=000001d9 EDX=00000000

   Fix this by never intercepting MSR_IA32_DEBUGCTLMSR for SEV-ES guests.
   No additional save/restore logic is required since MSR_IA32_DEBUGCTLMSR
   is of swap type A.

o KVM will disable LBRV if userspace sets MSR_IA32_DEBUGCTLMSR before the
   VMSA is encrypted. Fix this by moving LBRV enablement code post VMSA
   encryption.

[1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June
      2023, Vol 2, 15.35.2 Enabling SEV-ES.
      https://bugzilla.kernel.org/attachment.cgi?id=304653

Co-developed-by: Nikunj A Dadhania <nikunj@xxxxxxx>
Signed-off-by: Nikunj A Dadhania <nikunj@xxxxxxx>
Signed-off-by: Ravi Bangoria <ravi.bangoria@xxxxxxx>

Should this have a Fixes: tag, too?

Thanks,
Tom

---
  arch/x86/kvm/svm/sev.c | 13 ++++++++-----
  arch/x86/kvm/svm/svm.c |  8 +++++++-
  arch/x86/kvm/svm/svm.h |  3 ++-
  3 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 1a2bde579727..3f0c3dbce0c5 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -851,6 +851,14 @@ static int __sev_launch_update_vmsa(struct kvm *kvm, struct kvm_vcpu *vcpu,
  	 */
  	fpstate_set_confidential(&vcpu->arch.guest_fpu);
  	vcpu->arch.guest_state_protected = true;
+
+	/*
+	 * SEV-ES guest mandates LBR Virtualization to be _always_ ON. Enable it
+	 * only after setting guest_state_protected because KVM_SET_MSRS allows
+	 * dynamic toggling of LBRV (for performance reason) on write access to
+	 * MSR_IA32_DEBUGCTLMSR when guest_state_protected is not set.
+	 */
+	svm_enable_lbrv(vcpu);
  	return 0;
  }
  
@@ -4279,7 +4287,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
  	struct kvm_vcpu *vcpu = &svm->vcpu;
  
  	svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ES_ENABLE;
-	svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK;
  
  	/*
  	 * An SEV-ES guest requires a VMSA area that is a separate from the
@@ -4331,10 +4338,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
  	/* Clear intercepts on selected MSRs */
  	set_msr_interception(vcpu, svm->msrpm, MSR_EFER, 1, 1);
  	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_CR_PAT, 1, 1);
-	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1);
-	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
-	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
-	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
  }
  
  void sev_init_vmcb(struct vcpu_svm *svm)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index dcb5eb00a4f5..011e8e6c5c53 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -99,6 +99,7 @@ static const struct svm_direct_access_msrs {
  	{ .index = MSR_IA32_SPEC_CTRL,			.always = false },
  	{ .index = MSR_IA32_PRED_CMD,			.always = false },
  	{ .index = MSR_IA32_FLUSH_CMD,			.always = false },
+	{ .index = MSR_IA32_DEBUGCTLMSR,		.always = false },
  	{ .index = MSR_IA32_LASTBRANCHFROMIP,		.always = false },
  	{ .index = MSR_IA32_LASTBRANCHTOIP,		.always = false },
  	{ .index = MSR_IA32_LASTINTFROMIP,		.always = false },
@@ -990,7 +991,7 @@ void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb)
  	vmcb_mark_dirty(to_vmcb, VMCB_LBR);
  }
  
-static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
+void svm_enable_lbrv(struct kvm_vcpu *vcpu)
  {
  	struct vcpu_svm *svm = to_svm(vcpu);
  
@@ -1000,6 +1001,9 @@ static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
  	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
  	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
  
+	if (sev_es_guest(vcpu->kvm))
+		set_msr_interception(vcpu, svm->msrpm, MSR_IA32_DEBUGCTLMSR, 1, 1);
+
  	/* Move the LBR msrs to the vmcb02 so that the guest can see them. */
  	if (is_guest_mode(vcpu))
  		svm_copy_lbrs(svm->vmcb, svm->vmcb01.ptr);
@@ -1009,6 +1013,8 @@ static void svm_disable_lbrv(struct kvm_vcpu *vcpu)
  {
  	struct vcpu_svm *svm = to_svm(vcpu);
  
+	KVM_BUG_ON(sev_es_guest(vcpu->kvm), vcpu->kvm);
+
  	svm->vmcb->control.virt_ext &= ~LBR_CTL_ENABLE_MASK;
  	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 0, 0);
  	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0);
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 2d7fd09c08c9..c483d7149420 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -30,7 +30,7 @@
  #define	IOPM_SIZE PAGE_SIZE * 3
  #define	MSRPM_SIZE PAGE_SIZE * 2
  
-#define MAX_DIRECT_ACCESS_MSRS	47
+#define MAX_DIRECT_ACCESS_MSRS	48
  #define MSRPM_OFFSETS	32
  extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
  extern bool npt_enabled;
@@ -582,6 +582,7 @@ u32 *svm_vcpu_alloc_msrpm(void);
  void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm);
  void svm_vcpu_free_msrpm(u32 *msrpm);
  void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
+void svm_enable_lbrv(struct kvm_vcpu *vcpu);
  void svm_update_lbrv(struct kvm_vcpu *vcpu);
  
  int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);







