When taking a trap for an SMC instruction on the host, we must
stau true to the letter of the architecture and perform all the
actions that the CPU would otherwise do. Among those are clearing
the BTYPE and SS bits.
Just do that.
Fixes: a805e1fb3099 ("KVM: arm64: Add SMC handler in nVHE EL2")
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
---
arch/arm64/kvm/hyp/include/hyp/adjust_pc.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/kvm/hyp/include/hyp/adjust_pc.h b/arch/arm64/kvm/hyp/include/hyp/adjust_pc.h
index 4fdfeabefeb4..b1afb7b59a31 100644
--- a/arch/arm64/kvm/hyp/include/hyp/adjust_pc.h
+++ b/arch/arm64/kvm/hyp/include/hyp/adjust_pc.h
@@ -47,7 +47,13 @@ static inline void __kvm_skip_instr(struct kvm_vcpu *vcpu)
*/
static inline void kvm_skip_host_instr(void)
{
+ u64 spsr = read_sysreg_el2(SYS_SPSR);
+
write_sysreg_el2(read_sysreg_el2(SYS_ELR) + 4, SYS_ELR);
+
+ spsr &= ~(PSR_BTYPE_MASK | DBG_SPSR_SS);
+
+ write_sysreg_el2(spsr, SYS_SPSR);
}
#endif
--
2.39.2
