Hi all, this all started with a single patch by Ben to enable writing a user-mode driver for a PCI device that requires 64bit register read/writes on s390. A quick grep showed that there are several other drivers for PCI devices in the kernel that use readq/writeq and eventually could use this, too. So we decided to propose this for general inclusion. A couple of suggestions for refactorizations by Jason Gunthorpe and Alex Williamson later [1], I arrived at this little series that avoids some code duplication and structures the different-size accesses in vfio_pci_core_do_io_rw() in a way that the conditional compile of 8-byte accesses no longer creates an odd split of "else-if". The initial version was tested with a PCI device on s390. This version has only been tested for reads of 1..8 byte sizes and only been compile tested for a 32bit architecture (arm). Thank you, Gerd Bayer [1] https://lore.kernel.org/all/20240422153508.2355844-1-gbayer@xxxxxxxxxxxxx/ Changes v2 -> v3: - Introduce macro to generate body of different-size accesses in vfio_pci_core_do_io_rw (courtesy Alex Williamson). - Convert if-else if chain to a switch-case construct to better accommodate conditional compiles. Changes v1 -> v2: - On non 64bit architecture use at most 32bit accesses in vfio_pci_core_do_io_rw and describe that in the commit message. - Drop the run-time error on 32bit architectures. - The #endif splitting the "else if" is not really fortunate, but I'm open to suggestions. Ben Segal (1): vfio/pci: Support 8-byte PCI loads and stores Gerd Bayer (2): vfio/pci: Extract duplicated code into macro vfio/pci: Continue to refactor vfio_pci_core_do_io_rw drivers/vfio/pci/vfio_pci_rdwr.c | 154 +++++++++++++++++-------------- include/linux/vfio_pci_core.h | 3 + 2 files changed, 90 insertions(+), 67 deletions(-) -- 2.44.0
