From: Ben Segal <bpsegal@xxxxxxxxxx>
Many PCI adapters can benefit or even require full 64bit read
and write access to their registers. In order to enable work on
user-space drivers for these devices add two new variations
vfio_pci_core_io{read|write}64 of the existing access methods
when the architecture supports 64-bit ioreads and iowrites.
Since these access methods are instantiated on 64bit architectures,
only, their use in vfio_pci_core_do_io_rw() is restricted by conditional
compiles to these architectures.
Signed-off-by: Ben Segal <bpsegal@xxxxxxxxxx>
Co-developed-by: Gerd Bayer <gbayer@xxxxxxxxxxxxx>
Signed-off-by: Gerd Bayer <gbayer@xxxxxxxxxxxxx>
---
Hi all,
we've successfully used this patch with a user-mode driver for a PCI
device that requires 64bit register read/writes on s390. A quick grep
showed that there are several other drivers for PCI devices in the kernel
that use readq/writeq and eventually could use this, too.
So we decided to propose this for general inclusion.
Thank you,
Gerd Bayer
Changes v1 -> v2:
- On non 64bit architecture use at most 32bit accesses in
vfio_pci_core_do_io_rw and describe that in the commit message.
- Drop the run-time error on 32bit architectures.
- The #endif splitting the "else if" is not really fortunate, but I'm
open to suggestions.
drivers/vfio/pci/vfio_pci_rdwr.c | 28 ++++++++++++++++++++++++++++
include/linux/vfio_pci_core.h | 3 +++
2 files changed, 31 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
index 03b8f7ada1ac..d83cb0bb7aa5 100644
--- a/drivers/vfio/pci/vfio_pci_rdwr.c
+++ b/drivers/vfio/pci/vfio_pci_rdwr.c
@@ -89,6 +89,9 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size);
VFIO_IOREAD(8)
VFIO_IOREAD(16)
VFIO_IOREAD(32)
+#ifdef ioread64
+VFIO_IOREAD(64)
+#endif
/*
* Read or write from an __iomem region (MMIO or I/O port) with an excluded
@@ -114,6 +117,31 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
else
fillable = 0;
+#if defined(ioread64) && defined(iowrite64)
+ if (fillable >= 8 && !(off % 8)) {
+ u64 val;
+
+ if (iswrite) {
+ if (copy_from_user(&val, buf, 8))
+ return -EFAULT;
+
+ ret = vfio_pci_core_iowrite64(vdev, test_mem,
+ val, io + off);
+ if (ret)
+ return ret;
+ } else {
+ ret = vfio_pci_core_ioread64(vdev, test_mem,
+ &val, io + off);
+ if (ret)
+ return ret;
+
+ if (copy_to_user(buf, &val, 8))
+ return -EFAULT;
+ }
+
+ filled = 8;
+ } else
+#endif /* defined(ioread64) && defined(iowrite64) */
if (fillable >= 4 && !(off % 4)) {
u32 val;
diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h
index a2c8b8bba711..f4cf5fd2350c 100644
--- a/include/linux/vfio_pci_core.h
+++ b/include/linux/vfio_pci_core.h
@@ -157,5 +157,8 @@ int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev, \
VFIO_IOREAD_DECLATION(8)
VFIO_IOREAD_DECLATION(16)
VFIO_IOREAD_DECLATION(32)
+#ifdef ioread64
+VFIO_IOREAD_DECLATION(64)
+#endif
#endif /* VFIO_PCI_CORE_H */
--
2.44.0
