[PATCH] vfio/pci: Support 8-byte PCI loads and stores

[Gerd Bayer <gbayer@xxxxxxxxxxxxx>]

From: Ben Segal <bpsegal@xxxxxxxxxx>

Many PCI adapters can benefit or even require full 64bit read
and write access to their registers. In order to enable work on
user-space drivers for these devices add two new variations
vfio_pci_core_io{read|write}64 of the existing access methods
when the architecture supports 64-bit ioreads and iowrites.

Signed-off-by: Ben Segal <bpsegal@xxxxxxxxxx>
Co-developed-by: Gerd Bayer <gbayer@xxxxxxxxxxxxx>
Signed-off-by: Gerd Bayer <gbayer@xxxxxxxxxxxxx>
---

Hi all,

we've successfully used this patch with a user-mode driver for a PCI
device that requires 64bit register read/writes on s390. A quick grep
showed that there are several other drivers for PCI devices in the kernel
that use readq/writeq and eventually could use this too.
So we decided to propose this for general inclusion.

We've added conditional compiles for non-64bit architectures that
produce graceful run-time errors. However, that path is just
compile-tested.

Thank you,
Gerd Bayer

 drivers/vfio/pci/vfio_pci_rdwr.c | 39 +++++++++++++++++++++++++++++++-
 include/linux/vfio_pci_core.h    |  3 +++
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c
index 03b8f7ada1ac..3f91945ea3ff 100644
--- a/drivers/vfio/pci/vfio_pci_rdwr.c
+++ b/drivers/vfio/pci/vfio_pci_rdwr.c
@@ -89,6 +89,9 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size);
 VFIO_IOREAD(8)
 VFIO_IOREAD(16)
 VFIO_IOREAD(32)
+#ifdef ioread64
+VFIO_IOREAD(64)
+#endif
 
 /*
  * Read or write from an __iomem region (MMIO or I/O port) with an excluded
@@ -114,7 +117,41 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem,
 		else
 			fillable = 0;
 
-		if (fillable >= 4 && !(off % 4)) {
+		if (fillable >= 8 && !(off % 8)) {
+#if defined(ioread64) || defined(iowrite64)
+			u64 val;
+#endif
+
+			if (iswrite) {
+#ifndef iowrite64
+				pr_err_once("vfio does not support iowrite64 on this arch");
+				return -EIO;
+#else
+				if (copy_from_user(&val, buf, 8))
+					return -EFAULT;
+
+				ret = vfio_pci_core_iowrite64(vdev, test_mem,
+							 val, io + off);
+				if (ret)
+					return ret;
+#endif
+			} else {
+#ifndef ioread64
+				pr_err_once("vfio does not support ioread64 on this arch");
+				return -EIO;
+#else
+				ret = vfio_pci_core_ioread64(vdev, test_mem,
+							&val, io + off);
+				if (ret)
+					return ret;
+
+				if (copy_to_user(buf, &val, 8))
+					return -EFAULT;
+#endif
+			}
+
+			filled = 8;
+		} else if (fillable >= 4 && !(off % 4)) {
 			u32 val;
 
 			if (iswrite) {
diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h
index a2c8b8bba711..f4cf5fd2350c 100644
--- a/include/linux/vfio_pci_core.h
+++ b/include/linux/vfio_pci_core.h
@@ -157,5 +157,8 @@ int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev,	\
 VFIO_IOREAD_DECLATION(8)
 VFIO_IOREAD_DECLATION(16)
 VFIO_IOREAD_DECLATION(32)
+#ifdef ioread64
+VFIO_IOREAD_DECLATION(64)
+#endif
 
 #endif /* VFIO_PCI_CORE_H */
-- 
2.44.0