Avoid testing reserved bits of MSR_IA32_FLUSH_CMD in hardware. Since KVM
passes through the MSR at runtime, testing reserved bits directly on the HW
does not generate #GP in some older CPU models like skylake.
Ideally, it could be fixed by enumerating all such CPU models. The value
added is would be low. So just focus on testing bits when the KVM force
emulation is enabled. This is in a new helper test_wrmsr_fep_fault().
Suggested-by: Sean Christopherson <seanjc@xxxxxxxxxx>
Signed-off-by: Mingwei Zhang <mizhang@xxxxxxxxxx>
---
x86/msr.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/x86/msr.c b/x86/msr.c
index 3a041fab..17f93029 100644
--- a/x86/msr.c
+++ b/x86/msr.c
@@ -112,6 +112,16 @@ static void test_rdmsr_fault(u32 msr, const char *name)
"Expected #GP on RDSMR(%s), got vector %d", name, vector);
}
+static void test_wrmsr_fep_fault(u32 msr, const char *name,
+ unsigned long long val)
+{
+ unsigned char vector = wrmsr_fep_safe(msr, val);
+
+ report(vector == GP_VECTOR,
+ "Expected #GP on emulated WRSMR(%s, 0x%llx), got vector %d",
+ name, val, vector);
+}
+
static void test_msr(struct msr_info *msr, bool is_64bit_host)
{
if (is_64bit_host || !msr->is_64bit_only) {
@@ -302,8 +312,11 @@ static void test_cmd_msrs(void)
test_wrmsr_fault(MSR_IA32_FLUSH_CMD, "FLUSH_CMD", 0);
test_wrmsr_fault(MSR_IA32_FLUSH_CMD, "FLUSH_CMD", L1D_FLUSH);
}
- for (i = 1; i < 64; i++)
- test_wrmsr_fault(MSR_IA32_FLUSH_CMD, "FLUSH_CMD", BIT_ULL(i));
+
+ if (is_fep_available()) {
+ for (i = 1; i < 64; i++)
+ test_wrmsr_fep_fault(MSR_IA32_FLUSH_CMD, "FLUSH_CMD", BIT_ULL(i));
+ }
}
int main(int ac, char **av)
--
2.44.0.683.g7961c838ac-goog
