From: Joey Gouly <joey.gouly@xxxxxxx>
Check that the requested SVE vector length matches what
the Realm was configured with.
Signed-off-by: Joey Gouly <joey.gouly@xxxxxxx>
[ Fix build failures on arm ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
---
arm/selftest.c | 6 ++++++
arm/unittests.cfg | 2 +-
lib/arm/asm/sve-vl-test.h | 9 +++++++++
lib/arm64/asm/sve-vl-test.h | 28 ++++++++++++++++++++++++++++
4 files changed, 44 insertions(+), 1 deletion(-)
create mode 100644 lib/arm/asm/sve-vl-test.h
create mode 100644 lib/arm64/asm/sve-vl-test.h
diff --git a/arm/selftest.c b/arm/selftest.c
index 8caadad3..7bc5fb76 100644
--- a/arm/selftest.c
+++ b/arm/selftest.c
@@ -21,6 +21,8 @@
#include <asm/barrier.h>
#include <asm/rsi.h>
+#include <asm/sve-vl-test.h>
+
static cpumask_t ready, valid;
static void __user_psci_system_off(void)
@@ -60,6 +62,10 @@ static void check_setup(int argc, char **argv)
"number of CPUs matches expectation");
report_info("found %d CPUs", nr_cpus);
++nr_tests;
+
+ } else if (strcmp(argv[i], "sve-vl") == 0) {
+ if (check_arm_sve_vl(val))
+ nr_tests++;
}
report_prefix_pop();
diff --git a/arm/unittests.cfg b/arm/unittests.cfg
index e35e8506..3cf6b719 100644
--- a/arm/unittests.cfg
+++ b/arm/unittests.cfg
@@ -33,7 +33,7 @@
[selftest-setup]
file = selftest.flat
smp = 2
-extra_params = -m 256 -append 'setup smp=2 mem=256'
+extra_params = -m 256 -append 'setup smp=2 mem=256 sve-vl'
groups = selftest
# Test vector setup and exception handling (kernel mode).
diff --git a/lib/arm/asm/sve-vl-test.h b/lib/arm/asm/sve-vl-test.h
new file mode 100644
index 00000000..19eaf669
--- /dev/null
+++ b/lib/arm/asm/sve-vl-test.h
@@ -0,0 +1,9 @@
+#ifndef __ARM_SVE_VL_TEST_H
+#define __ARM_SVE_VL_TEST_H
+
+static bool check_arm_sve_vl(long val)
+{
+ return false;
+}
+
+#endif
diff --git a/lib/arm64/asm/sve-vl-test.h b/lib/arm64/asm/sve-vl-test.h
new file mode 100644
index 00000000..c82ea154
--- /dev/null
+++ b/lib/arm64/asm/sve-vl-test.h
@@ -0,0 +1,28 @@
+#ifndef __ARM_SVE_VL_TEST_H_
+#define __ARM_SVE_VL_TEST_H_
+
+#include <asm/processor.h>
+#include <asm/sysreg.h>
+
+static bool check_arm_sve_vl(long val)
+{
+ unsigned long vl;
+
+ if (!system_supports_sve()) {
+ report_skip("SVE is not supported\n");
+ } else {
+ /* Enable the maxium SVE vector length */
+ write_sysreg(ZCR_EL1_LEN, ZCR_EL1);
+ vl = sve_vl();
+ /* Realms are configured with a SVE VL */
+ if (is_realm()) {
+ report(vl == val,
+ "SVE VL expected (%ld), detected (%ld)",
+ val, vl);
+ } else {
+ report(true, "Detected SVE VL %ld\n", vl);
+ }
+ }
+ return true;
+}
+#endif
--
2.34.1
