On 4/12/2024 3:21 AM, Sean Christopherson wrote:
> On Fri, Jan 26, 2024, Xiong Zhang wrote:
>> From: Xiong Zhang <xiong.y.zhang@xxxxxxxxx>
>>
>> When guest clear LVTPC_MASK bit in guest PMI handler at PMU passthrough
>> mode, this bit should be reflected onto HW, otherwise HW couldn't generate
>> PMI again during VM running until it is cleared.
>
> This fixes a bug in the previous patch, i.e. this should not be a standalone
> patch.
>
>>
>> This commit set HW LVTPC_MASK bit at PMU vecctor switching to KVM PMI
>> vector.
>>
>> Signed-off-by: Xiong Zhang <xiong.y.zhang@xxxxxxxxx>
>> Signed-off-by: Mingwei Zhang <mizhang@xxxxxxxxxx>
>> ---
>> arch/x86/events/core.c | 9 +++++++--
>> arch/x86/include/asm/perf_event.h | 2 +-
>> arch/x86/kvm/lapic.h | 1 -
>> 3 files changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 3f87894d8c8e..ece042cfb470 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -709,13 +709,18 @@ void perf_guest_switch_to_host_pmi_vector(void)
>> }
>> EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
>>
>> -void perf_guest_switch_to_kvm_pmi_vector(void)
>> +void perf_guest_switch_to_kvm_pmi_vector(bool mask)
>> {
>> lockdep_assert_irqs_disabled();
>>
>> - apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
>> + if (mask)
>> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR |
>> + APIC_LVT_MASKED);
>> + else
>> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
>> }
>
> Or more simply:
>
> void perf_guest_enter(u32 guest_lvtpc)
> {
> ...
>
> apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR |
> (guest_lvtpc & APIC_LVT_MASKED));
> }
>
> and then on the KVM side:
>
> perf_guest_enter(kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVTPC));
>
> because an in-kernel APIC should be a hard requirement for the mediated PMU.
> this is simpler and we will follow this.
thanks
