On Thu, Apr 11, 2024 at 1:59 PM Jim Mattson <jmattson@xxxxxxxxxx> wrote: > > From Intel's documention [1], "CPUID.(EAX=07H,ECX=0):EDX[26] > enumerates support for indirect branch restricted speculation (IBRS) > and the indirect branch predictor barrier (IBPB)." Further, from [2], > "Software that executed before the IBPB command cannot control the > predicted targets of indirect branches (4) executed after the command > on the same logical processor," where footnote 4 reads, "Note that > indirect branches include near call indirect, near jump indirect and > near return instructions. Because it includes near returns, it follows > that **RSB entries created before an IBPB command cannot control the > predicted targets of returns executed after the command on the same > logical processor.**" [emphasis mine] > > On the other hand, AMD's "IBPB may not prevent return branch > predictions from being specified by pre-IBPB branch targets" [3]. > > Since Linux sets the synthetic feature bit, X86_FEATURE_IBPB, on AMD > CPUs that implement the weaker version of IBPB, it is incorrect to > infer from this and X86_FEATURE_IBRS that the CPU supports the > stronger version of IBPB indicated by CPUID.(EAX=07H,ECX=0):EDX[26]. AMD's IBPB does apply to RET predictions if Fn8000_0008_EBX[IBPB_RET] = 1. Spot checking, Zen4 sets that bit; and the bulletin doesn't apply there. (Also checking - IA32_SPEC_CTRL and IA32_PRED_CMD are both still available; is there anything in KVM that keys off just X86_FEATURE_SPEC_CTRL? I'm not seeing it...) -- vs;
