On Thu, Feb 15, 2024 at 11:53:59PM +0000, Anish Moorthy wrote:
[...]
> + if (is_error_noslot_pfn(pfn)) {
> + kvm_prepare_memory_fault_exit(vcpu, gfn * PAGE_SIZE, PAGE_SIZE,
> + write_fault, exec_fault, false);
Hmm... Reinterpreting the fault context into something that wants to be
arch-neutral might make this a bit difficult for userspace to
understand.
The CPU can take an instruction abort on an S1PTW due to missing write
permissions, i.e. hardware cannot write to the stage-1 descriptor for an
AF or DBM update. In this case HPFAR points to the IPA of the stage-1
descriptor that took the fault, not the target page.
It would seem this gets expressed to userspace as an intent to write and
execute on the stage-1 page tables, no?
--
Thanks,
Oliver
