On Wed, Feb 21, 2024 at 01:46:21PM +0100, Markus Armbruster wrote:
> Date: Wed, 21 Feb 2024 13:46:21 +0100
> From: Markus Armbruster <armbru@xxxxxxxxxx>
> Subject: Re: [RFC 4/8] hw/core: Add cache topology options in -smp
>
> Zhao Liu <zhao1.liu@xxxxxxxxxxxxxxx> writes:
>
> > From: Zhao Liu <zhao1.liu@xxxxxxxxx>
> >
> > Add "l1d-cache", "l1i-cache". "l2-cache", and "l3-cache" options in
> > -smp to define the cache topology for SMP system.
> >
> > Signed-off-by: Zhao Liu <zhao1.liu@xxxxxxxxx>
>
> [...]
>
> > diff --git a/qapi/machine.json b/qapi/machine.json
> > index d0e7f1f615f3..0a923ac38803 100644
> > --- a/qapi/machine.json
> > +++ b/qapi/machine.json
> > @@ -1650,6 +1650,14 @@
> > #
> > # @threads: number of threads per core
> > #
> > +# @l1d-cache: topology hierarchy of L1 data cache (since 9.0)
> > +#
> > +# @l1i-cache: topology hierarchy of L1 instruction cache (since 9.0)
> > +#
> > +# @l2-cache: topology hierarchy of L2 unified cache (since 9.0)
> > +#
> > +# @l3-cache: topology hierarchy of L3 unified cache (since 9.0)
> > +#
>
> Too terse, just like my review ;-P
;-) Yes, I'll add more information to improve the readability of the
code and comments.
Thanks,
Zhao
>
> > # Since: 6.1
> > ##
> > { 'struct': 'SMPConfiguration', 'data': {
> > @@ -1662,7 +1670,11 @@
> > '*modules': 'int',
> > '*cores': 'int',
> > '*threads': 'int',
> > - '*maxcpus': 'int' } }
> > + '*maxcpus': 'int',
> > + '*l1d-cache': 'str',
> > + '*l1i-cache': 'str',
> > + '*l2-cache': 'str',
> > + '*l3-cache': 'str' } }
> >
> > ##
> > # @x-query-irq:
>
> [...]
>
