Re: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests

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Subject: Re: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests
From: Haibo Xu <xiaobo55x@xxxxxxxxx>
Date: Tue, 6 Feb 2024 09:32:17 +0800
Cc: Haibo Xu <haibo1.xu@xxxxxxxxx>, ajones@xxxxxxxxxxxxxxxx, Paul Walmsley <paul.walmsley@xxxxxxxxxx>, Palmer Dabbelt <palmer@xxxxxxxxxxx>, Albert Ou <aou@xxxxxxxxxxxxxxxxx>, Paolo Bonzini <pbonzini@xxxxxxxxxx>, Shuah Khan <shuah@xxxxxxxxxx>, Oliver Upton <oliver.upton@xxxxxxxxx>, James Morse <james.morse@xxxxxxx>, Suzuki K Poulose <suzuki.poulose@xxxxxxx>, Zenghui Yu <yuzenghui@xxxxxxxxxx>, Anup Patel <anup@xxxxxxxxxxxxxx>, Atish Patra <atishp@xxxxxxxxxxxxxx>, Guo Ren <guoren@xxxxxxxxxx>, Conor Dooley <conor.dooley@xxxxxxxxxxxxx>, Mayuresh Chitale <mchitale@xxxxxxxxxxxxxxxx>, wchen <waylingii@xxxxxxxxx>, Greentime Hu <greentime.hu@xxxxxxxxxx>, Jisheng Zhang <jszhang@xxxxxxxxxx>, Samuel Holland <samuel@xxxxxxxxxxxx>, Minda Chen <minda.chen@xxxxxxxxxxxxxxxx>, Sean Christopherson <seanjc@xxxxxxxxxx>, Peter Xu <peterx@xxxxxxxxxx>, Like Xu <likexu@xxxxxxxxxxx>, Vipin Sharma <vipinsh@xxxxxxxxxx>, Thomas Huth <thuth@xxxxxxxxxx>, Aaron Lewis <aaronlewis@xxxxxxxxxx>, Maciej Wieczor-Retman <maciej.wieczor-retman@xxxxxxxxx>, linux-kernel@xxxxxxxxxxxxxxx, linux-riscv@xxxxxxxxxxxxxxxxxxx, kvm@xxxxxxxxxxxxxxx, linux-kselftest@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, kvmarm@xxxxxxxxxxxxxxx, kvm-riscv@xxxxxxxxxxxxxxxxxxx
In-reply-to: <86zfwe6frn.wl-maz@kernel.org>
References: <cover.1705916069.git.haibo1.xu@intel.com> <CAJve8onDbX44Ph6a-FdO2+p7QOQLah-7OyF+yUc06wud+SvmQQ@mail.gmail.com> <86zfwe6frn.wl-maz@kernel.org>

On Tue, Feb 6, 2024 at 12:24 AM Marc Zyngier <maz@xxxxxxxxxx> wrote:
>
> On Mon, 05 Feb 2024 13:10:26 +0000,
> Haibo Xu <xiaobo55x@xxxxxxxxx> wrote:
> >
> > Hi Marc,
> >
> > Could you help review the first 3 patches in this series?
>
> For these 3 patches:
>
> Reviewed-by: Marc Zyngier <maz@xxxxxxxxxx>
>

Thanks for the review!

> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.

References:
- [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests
  - From: Haibo Xu
- Re: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests
  - From: Haibo Xu
- Re: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests
  - From: Marc Zyngier

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