From: Zhuocheng Ding <zhuocheng.ding@xxxxxxxxx>
The HRESET feature needs to have not only the feature bit of 0x07.0x01.
eax[bit 22] in the CPUID, but also the associated 0x20 leaf, so, pass-
through the Host's 0x20 leaf to Guest.
Since currently, HRESET is only used to clear ITD's classification
history, only expose HRESET related CPUID when Guest has the ITD
capability.
Tested-by: Yanting Jiang <yanting.jiang@xxxxxxxxx>
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@xxxxxxxxx>
Co-developed-by: Zhao Liu <zhao1.liu@xxxxxxxxx>
Signed-off-by: Zhao Liu <zhao1.liu@xxxxxxxxx>
---
arch/x86/kvm/cpuid.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 9e78398f29dc..726b723ee34b 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -197,6 +197,16 @@ static int kvm_check_hfi_cpuid(struct kvm_vcpu *vcpu,
if (data_size > hfi_features.nr_table_pages << PAGE_SHIFT)
return -EINVAL;
+ /*
+ * Check HRESET leaf since Guest's control of MSR_IA32_HW_HRESET_ENABLE
+ * needs to take effect on hardware.
+ */
+ best = cpuid_entry2_find(entries, nent, 0x20, 0);
+
+ /* Cannot set the Guest bit that is unsopported by Host. */
+ if (best && best->ebx & ~cpuid_ebx(0x20))
+ return -EINVAL;
+
return 0;
}
@@ -784,6 +794,10 @@ void kvm_set_cpu_caps(void)
F(AMX_FP16) | F(AVX_IFMA) | F(LAM)
);
+ /* Currently HRESET is used to reset the ITD related history. */
+ if (kvm_cpu_cap_has(X86_FEATURE_ITD))
+ kvm_cpu_cap_set(X86_FEATURE_HRESET);
+
kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,
F(AVX_VNNI_INT8) | F(AVX_NE_CONVERT) | F(PREFETCHITI) |
F(AMX_COMPLEX)
@@ -1030,7 +1044,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
switch (function) {
case 0:
/* Limited to the highest leaf implemented in KVM. */
- entry->eax = min(entry->eax, 0x1fU);
+ entry->eax = min(entry->eax, 0x20U);
break;
case 1:
cpuid_entry_override(entry, CPUID_1_EDX);
@@ -1300,6 +1314,16 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
break;
}
break;
+ /* Intel HRESET */
+ case 0x20:
+ if (!kvm_cpu_cap_has(X86_FEATURE_HRESET)) {
+ entry->eax = 0;
+ entry->ebx = 0;
+ entry->ecx = 0;
+ entry->edx = 0;
+ break;
+ }
+ break;
case KVM_CPUID_SIGNATURE: {
const u32 *sigptr = (const u32 *)KVM_SIGNATURE;
entry->eax = KVM_CPUID_FEATURES;
--
2.34.1
