On Thu, Feb 01, 2024 at 12:09:02AM +0100, Paolo Bonzini wrote: > MKTME repurposes the high bit of physical address to key id for encryption > key and, even though MAXPHYADDR in CPUID[0x80000008] remains the same, > the valid bits in the MTRR mask register are based on the reduced number > of physical address bits. > > detect_tme() in arch/x86/kernel/cpu/intel.c detects TME and subtracts > it from the total usable physical bits, but it is called too late. > Move the call to early_init_intel() so that it is called in setup_arch(), > before MTRRs are setup. > > This fixes boot on TDX-enabled systems, which until now only worked with > "disable_mtrr_cleanup". Without the patch, the values written to the > MTRRs mask registers were 52-bit wide (e.g. 0x000fffff_80000800) and > the writes failed; with the patch, the values are 46-bit wide, which > matches the reduced MAXPHYADDR that is shown in /proc/cpuinfo. > > Reported-by: Zixi Chen <zixchen@xxxxxxxxxx> > Cc: Adam Dunlap <acdunlap@xxxxxxxxxx> > Cc: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > Cc: Xiaoyao Li <xiaoyao.li@xxxxxxxxx> > Cc: Kai Huang <kai.huang@xxxxxxxxx> > Cc: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > Cc: Ingo Molnar <mingo@xxxxxxxxxx> > Cc: x86@xxxxxxxxxx > Cc: stable@xxxxxxxxxxxxxxx > Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> Reviewed-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> -- Kiryl Shutsemau / Kirill A. Shutemov
