On Mon, Jan 15, 2024 at 02:02:09PM -0800, Jing Zhang wrote:
> There are some feature fields with nonzero minimum valid value. Make
> sure get_safe_value() won't return invalid field values for them.
> Also fix a bug that wrongly uses the feature bits type as the feature
> bits sign causing all fields as signed in the get_safe_value() and
> get_invalid_value().
>
> Fixes: 54a9ea73527d ("KVM: arm64: selftests: Test for setting ID register from usersapce")
> Reported-by: Zenghui Yu <yuzenghui@xxxxxxxxxx>
> Reported-by: Itaru Kitayama <itaru.kitayama@xxxxxxxxx>
> Tested-by: Itaru Kitayama <itaru.kitayama@xxxxxxxxxxx>
> Signed-off-by: Jing Zhang <jingzhangos@xxxxxxxxxx>
v2 works on FVP.
Tested-by: Itaru Kitayama <itaru.kitayama@xxxxxxxxxxx>
Thanks,
Itaru.
>
> ---
> * v1 -> v2:
> - Use ftr_bits->safe_val for minimal safe value for type FTR_LOWER_SAFE.
> - Fix build error reported by Zenghui with gcc-10.3.1.
> ---
> .../selftests/kvm/aarch64/set_id_regs.c | 18 +++++++++++-------
> 1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/aarch64/set_id_regs.c b/tools/testing/selftests/kvm/aarch64/set_id_regs.c
> index bac05210b539..16e2338686c1 100644
> --- a/tools/testing/selftests/kvm/aarch64/set_id_regs.c
> +++ b/tools/testing/selftests/kvm/aarch64/set_id_regs.c
> @@ -32,6 +32,10 @@ struct reg_ftr_bits {
> enum ftr_type type;
> uint8_t shift;
> uint64_t mask;
> + /*
> + * For FTR_EXACT, safe_val is used as the exact safe value.
> + * For FTR_LOWER_SAFE, safe_val is used as the minimal safe value.
> + */
> int64_t safe_val;
> };
>
> @@ -65,13 +69,13 @@ struct test_feature_reg {
>
> static const struct reg_ftr_bits ftr_id_aa64dfr0_el1[] = {
> S_REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64DFR0_EL1, PMUVer, 0),
> - REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64DFR0_EL1, DebugVer, 0),
> + REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64DFR0_EL1, DebugVer, ID_AA64DFR0_EL1_DebugVer_IMP),
> REG_FTR_END,
> };
>
> static const struct reg_ftr_bits ftr_id_dfr0_el1[] = {
> - S_REG_FTR_BITS(FTR_LOWER_SAFE, ID_DFR0_EL1, PerfMon, 0),
> - REG_FTR_BITS(FTR_LOWER_SAFE, ID_DFR0_EL1, CopDbg, 0),
> + S_REG_FTR_BITS(FTR_LOWER_SAFE, ID_DFR0_EL1, PerfMon, ID_DFR0_EL1_PerfMon_PMUv3),
> + REG_FTR_BITS(FTR_LOWER_SAFE, ID_DFR0_EL1, CopDbg, ID_DFR0_EL1_CopDbg_Armv8),
> REG_FTR_END,
> };
>
> @@ -224,13 +228,13 @@ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr)
> {
> uint64_t ftr_max = GENMASK_ULL(ARM64_FEATURE_FIELD_BITS - 1, 0);
>
> - if (ftr_bits->type == FTR_UNSIGNED) {
> + if (ftr_bits->sign == FTR_UNSIGNED) {
> switch (ftr_bits->type) {
> case FTR_EXACT:
> ftr = ftr_bits->safe_val;
> break;
> case FTR_LOWER_SAFE:
> - if (ftr > 0)
> + if (ftr > ftr_bits->safe_val)
> ftr--;
> break;
> case FTR_HIGHER_SAFE:
> @@ -252,7 +256,7 @@ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr)
> ftr = ftr_bits->safe_val;
> break;
> case FTR_LOWER_SAFE:
> - if (ftr > 0)
> + if (ftr > ftr_bits->safe_val)
> ftr--;
> break;
> case FTR_HIGHER_SAFE:
> @@ -276,7 +280,7 @@ uint64_t get_invalid_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr)
> {
> uint64_t ftr_max = GENMASK_ULL(ARM64_FEATURE_FIELD_BITS - 1, 0);
>
> - if (ftr_bits->type == FTR_UNSIGNED) {
> + if (ftr_bits->sign == FTR_UNSIGNED) {
> switch (ftr_bits->type) {
> case FTR_EXACT:
> ftr = max((uint64_t)ftr_bits->safe_val + 1, ftr + 1);
>
> base-commit: 0dd3ee31125508cd67f7e7172247f05b7fd1753a
> --
> 2.43.0.381.gb435a96ce8-goog
>
