On Mon, Jan 15, 2024 at 03:20:37PM +0800, Zhao Liu wrote: > On Mon, Jan 15, 2024 at 02:57:30PM +0800, Yuan Yao wrote: > > Date: Mon, 15 Jan 2024 14:57:30 +0800 > > From: Yuan Yao <yuan.yao@xxxxxxxxxxxxxxx> > > Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] > > > > On Mon, Jan 15, 2024 at 02:20:20PM +0800, Zhao Liu wrote: > > > On Mon, Jan 15, 2024 at 01:20:22PM +0800, Yuan Yao wrote: > > > > Date: Mon, 15 Jan 2024 13:20:22 +0800 > > > > From: Yuan Yao <yuan.yao@xxxxxxxxxxxxxxx> > > > > Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F] > > > > > > > > Ah, so my understanding is incorrect on this. > > > > > > > > I tried on one raptor lake i5-i335U, which also hybrid soc but doesn't have > > > > module level, in this case 0x1f and 0xb have same values in core/lp level. > > > > > > Some socs have modules/dies but they don't expose them in 0x1f. > > > > Here they don't expose because from hardware level they can't or possible > > software level configuration (i.e. disable some cores in bios) ? > > > > This leaf is decided at hardware level. Whether or not which levels are exposed > sometimes depends if there is the topology-related feature, but there is no clear > rule (just as in the ADL family neither ADL-S/P exposes modules, while ADL-N > exposes modules). I see, thanks for your information! > > Regards, > Zhao >
