When host doesn't support 5-level EPT, bits 51:48 of the guest physical
address must all be zero, otherwise an EPT violation always occurs[1], and
current handler can't resolve if the GPA is in RAM region. So, instruction
will be re-executed again and again, which causes infinite EPT violation.
Six KVM selftests are timeout due to this issue:
kvm:access_tracking_perf_test
kvm:demand_paging_test
kvm:dirty_log_test
kvm:dirty_log_perf_test
kvm:kvm_page_table_test
kvm:memslot_modification_stress_test
Just report the max supported physical bits and not host physical bits to
guest which is limited by TDP.
[1]
https://www.intel.com/content/www/us/en/content-details/671442/5-level-paging-and-5-level-ept-white-paper.html
Tao Su (2):
x86: KVM: Limit guest physical bits when 5-level EPT is unsupported
x86: KVM: Emulate instruction when GPA can't be translated by EPT
arch/x86/kvm/cpuid.c | 5 +++--
arch/x86/kvm/mmu.h | 1 +
arch/x86/kvm/mmu/mmu.c | 7 +++++++
arch/x86/kvm/vmx/vmx.c | 7 +++++++
4 files changed, 18 insertions(+), 2 deletions(-)
base-commit: ceb6a6f023fd3e8b07761ed900352ef574010bcb
--
2.34.1
