Re: [PATCH v7 02/26] x86/fpu/xstate: Refine CET user xstate bit enabling

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On 12/14/2023 1:01 AM, Chang S. Bae wrote:
On 12/13/2023 1:30 AM, Yang, Weijiang wrote:

Let me involve Chang, the author of the code in question.

Hi, Chang,
In commit 70c3f1671b0c ("x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers"),
you modified the loop as below:
         for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
-               if (!boot_cpu_has(xsave_cpuid_features[i]))
+               unsigned short cid = xsave_cpuid_features[i];
+
+               /* Careful: X86_FEATURE_FPU is 0! */
+               if ((i != XFEATURE_FP && !cid) || !boot_cpu_has(cid))
                         fpu_kernel_cfg.max_features &= ~BIT_ULL(i);
         }

IMHO the change resulted functional change of the loop, i.e., before that only it only clears the bits without CPUIDs,
but after the change, the side-effect of the loop will clear the bits of blank entries ( where xsave_cpuid_features[i] == 0 )
since the loop hits (i != XFEATURE_FP && !cid), is it intended or something else?

The code was considered as much *simpler* than the other [1]. Yes, it clears those not listed in the table but they were either non-existed or disabled at that moment.

Thanks Chang, so I assume the "side-effect" is intended.


Thanks,
Chang

[1] https://lore.kernel.org/lkml/87y2eha576.fsf@xxxxxxxxxxxxxxxxxxxxxxx/






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