On Wed, Dec 06, 2023 at 04:23:25PM +0000, Catalin Marinas wrote: > On Wed, Dec 06, 2023 at 11:38:09AM -0400, Jason Gunthorpe wrote: > > On Wed, Dec 06, 2023 at 04:18:05PM +0100, Lorenzo Pieralisi wrote: > > > On Wed, Dec 06, 2023 at 11:05:56AM -0400, Jason Gunthorpe wrote: > > > > On Wed, Dec 06, 2023 at 02:49:02PM +0000, Catalin Marinas wrote: > > > > > BTW, on those Mellanox devices that require different attributes within > > > > > a BAR, do they have a problem with speculative reads causing > > > > > side-effects? > > > > > > > > Yes. We definitely have had that problem in the past on older > > > > devices. VFIO must map the BAR using pgprot_device/noncached() into > > > > the VMM, no other choice is functionally OK. > > > > > > Were those BARs tagged as prefetchable or non-prefetchable ? I assume the > > > latter but please let me know if I am guessing wrong. > > > > I don't know it was quite old HW. Probably. > > > > Just because a BAR is not marked as prefetchable doesn't mean that the > > device can't use NORMAL_NC on subsets of it. > > What about the other way around - would we have a prefetchable BAR that > has portions which are unprefetchable? I would say possibly. Prefetch is a dead concept in PCIe, it was obsoleted in PCI-X about 20 years ago. No PCIe system has ever done prefetch. There is a strong incentive to mark BAR's as prefetchable because it allows 64 bit addressing in configurations with bridges. So.. I would expect people have done interesting things here. Jason
